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TMS320DM8148_1109 Datasheet(PDF) 56 Page - Texas Instruments

Part # TMS320DM8148_1109
Description  TMS320DM814x DaVinci Digital Media Processors
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
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TMS320DM8148_1109 Datasheet(HTML) 56 Page - Texas Instruments

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TMS320DM8148, TMS320DM8147, TMS320DM8146
SPRS647B
– MARCH 2011 – REVISED SEPTEMBER 2011
www.ti.com
3.2.5
EDMA
Table 3-6. EDMA Terminal Functions
SIGNAL
TYPE(1)
OTHER(2) (3)
MUXED
DESCRIPTION
NAME
NO.
EDMA
AUD_CLKIN1/
AUD_CLKIN1,
MCA[0]_AXR[8]/
MCA[0], MCA[1],
MCA[1]_AHCLKX/
MCA[4], TIMER2,
IPD
MCA[4]_AHCLKX/
R5
I
GP0
DVDD
EDMA_EVT3/
PINCNTL15
TIM2_IO/
DSIS: PIN
GP0[8]
MM: MUX1
External EDMA Event 3
GPMC_CLK/
GPMC_CS[5]/
GPMC, CLKOUT1,
GPMC_WAIT[1]/
TIMER4, GP1
IPU
CLKOUT1/
R26
I
PINCNTL127
DVDD_GPMC
EDMA_EVT3/
DSIS: PIN
TIM4_IO/
MM: MUX0
GP1[27]
AUD_CLKIN2/
AUD_CLKIN2,
MCA[0]_AXR[9]/
MCA[0], MCA[2].
MCA[2]_AHCLKX/
MCA[5], TIMER3,
IPD
MCA[5]_AHCLKX/
H1
I
GP0
DVDD
EDMA_EVT2/
PINCNTL16
TIM3_IO/
DSIS: PIN
External EDMA Event 2
GP0[9]
MM: MUX1
GPMC_BE[0]_CLE/
GPMC, TIMER6,
GPMC_A[25]/
GP1
IPD
EDMA_EVT2/
U27
I
PINCNTL131
DVDD_GPMC
TIM6_IO/
DSIS: PIN
GP1[29]
MM: MUX0
SPI[0]_SCS[1]/
SPI[0], SD1,
SD1_SDCD/
SATA, TIMER4,
SATA_ACT0_LED/
IPU
GP1
AE5
I
EDMA_EVT1/
DVDD
PINCNTL80
TIM4_IO/
DSIS: PIN
GP1[6]
MM: MUX1
External EDMA Event 1
GPMC_BE[1]/
GPMC, TIMER7,
GPMC_A[24]/
GP1
IPD
EDMA_EVT1/
V28
I
PINCNTL132
DVDD_GPMC
TIM7_IO/
DSIS: PIN
GP1[30]
MM: MUX0
SD2_DAT[4]/
GPMC_A[27]/
SD2, GPMC,
GPMC_A[23]/
TIMER7, GP1
IPU
GPMC_CS[7]/
R24
I
PINCNTL116
DVDD_GPMC
EDMA_EVT0/
DSIS: PIN
TIM7_IO/
MM: MUX1
External EDMA Event 0
GP1[22]
GPMC_WAIT[0]/
GPMC, GP1
GPMC_A[26]/
IPU
PINCNTL133
W28
I
EDMA_EVT0/
DVDD_GPMC
DSIS: PIN
GP1[31]
MM: MUX0
(1)
I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal, MM = Multi Muxed, DSIS =
De-selected Input State
(2)
IPD = Internal Pulldown Active, IPU = Internal Pullup Active, DIS = Internal Pull Disabled. This represents the default state of the
Internal Pull after Reset. For more detailed information on pullup/pulldown resistors and situations where external pullup/pulldown
resistors are required, see , Pullup/Pulldown Resistors and the , Pin Behaviors at Reset.
(3)
Specifies the operating I/O supply voltage for each signal
56
Device Pins
Copyright
© 2011, Texas Instruments Incorporated
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Product Folder Link(s): TMS320DM8148 TMS320DM8147 TMS320DM8146


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