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TMS320DM8148_1109 Datasheet(PDF) 14 Page - Texas Instruments

Part # TMS320DM8148_1109
Description  TMS320DM814x DaVinci Digital Media Processors
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
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TMS320DM8148_1109 Datasheet(HTML) 14 Page - Texas Instruments

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TMS320DM8148, TMS320DM8147, TMS320DM8146
SPRS647B
– MARCH 2011 – REVISED SEPTEMBER 2011
www.ti.com
Thumb-2 Instruction Set
Jazelle RCT Acceleration
CP14 Debug Coprocessor
CP15 System Control Coprocessor
NEON
™ 64-/128-bit Hybrid SIMD Engine for Multimedia
Enhanced VFPv3 Floating-Point Coprocessor
Enhanced Memory Management Unit (MMU)
Separate Level-1 Instruction and Data Caches
Integrated Level-2 Cache
128-bit Interconnector-to-System Memories and Peripherals
Embedded Trace Module (ETM).
2.4.2
Embedded Trace Module (ETM)
To support real-time trace, the ARM Cortex-A8 processor provides an interface to enable connection of an
embedded trace module (ETM). The ETM consists of two parts:
The Trace port which provides real-time trace capability for the ARM Cortex-A8.
Triggering facilities that provide trigger resources, which include address and data comparators,
counter, and sequencers.
The ARM Cortex-A8 trace port is not pinned out and is, instead, only connected to the system-level
Embedded Trace Buffer (ETB). The ETB has a 32KB buffer memory. ETB enabled debug tools are
required to read/interpret the captured trace data.
For more details on the ETM, see Section 8.5.2, Trace.
2.4.3
ARM Cortex-A8 Interrupt Controller (AINTC)
The ARM Cortex-A8 subsystem contains an interrupt controller (AINTC) that prioritizes all service requests
from the system peripherals and generates either IRQ or FIQ to the ARM Cortex-A8 processor. For more
details on the AINTC, see Section 7.5.1, ARM Cortex-A8 Interrupts.
2.4.4
ARM Cortex-A8 PLL (PLL_ARM)
The ARM Cortex-A8 subsystem contains an embedded PLL Controller (PLL_ARM) for generating the
subsystem
’s clocks from the DEV Clock input. For more details on the PLL_ARM, see Section 7.4,
Clocking.
2.4.5
ARM MPU Interconnect
The ARM Cortex-A8 processor is connected through the arbiter to both an L3 interconnect port and a
DMM port. The DMM port is 128-bits wide and provides the ARM Cortex-A8 direct access to the DDR
memories, while the L3 interconnect port is 64-bits wide and provides access to the remaining device
modules.
14
Device Overview
Copyright
© 2011, Texas Instruments Incorporated
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Product Folder Link(s): TMS320DM8148 TMS320DM8147 TMS320DM8146


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