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TMX320DM8148BCYEA0 Datasheet(PDF) 8 Page - Texas Instruments |
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TMX320DM8148BCYEA0 Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 360 page  TMS320DM8148, TMS320DM8147, TMS320DM8146 SPRS647B – MARCH 2011 – REVISED SEPTEMBER 2011 www.ti.com SEE ADDITIONS/MODIFICATIONS/DELETIONS Table 3-31, SPI 1 Terminal Functions • Updated/Changed the SPI[1]_SCS[1] (W6), SPI[1]_SCS[2] (AF5), SPI[1]_SCS[3] (AE6) Section 3.2.17 de-selected input state from "DSIS: 1" to "DSIS: PIN" SPI Table 3-48, Reserved Terminal Functions: • Updated/Changed RSV4 [Y14] and RSV5 [AC8] DESCRIPTION to "Reserved. (Leave Section 3.2.25 unconnected, do not connect to power or ground.)" [FAE ALERT] Reserved Pins Table 5-1, L3 Master/Slave Connectivity: • Updated/Changed DSP/EDMA MMU to expose connectivity to GPMC, PCIe Gen2 Slave, McASP 0/1/2, McBSP, and L4 HS Periph Port 0 Section 5 Table 5-2, L4 Peripheral Connectivity: System Interconnect • Updated/Changed the C647x CONFIG and DEMMU connectivity for "L4 Fast Peripherals Port 0/1" and "L4 Slow Peripherals Port 0/1" Exposed DSP for McASP, McBSP, UART, I2C, SPI, EDMA, GPIO/INT, GPMC, EMAC, PCIe, Timers, and USB Section 6.1, Absolute Maximum Ratings: Section 6 • Deleted Operating case temperature range, TC Device Operating Conditions Section 6.2, Recommended Operating Conditions: • Deleted "4 mA I/O buffers" from the IOH, High-level output current row • Deleted "4 mA I/O buffers" from the IOL, Low-level output current row • Deleted TC , Operating case temperature range Section 6.3, Electrical Characteristics Over Recommended Ranges of Supply Voltage and Operating Temperature (Unless Otherwise Noted): • Added "(applies to all LDOCAP_x pins)" to LDOs row • Added MAX value of "1.5 V" to LDOs (applies to all LDOCAP_x pins) row • Updated/Changed VOH, High-level output voltage, LVCMOS (2) (1.8-V I/O) MIN value from "TBD" to "1.26" V Section 7.3.2, Power-on Reset (POR pin): Section 7.3 • Deleted "for a minimum of 2 DEV Clock cycles" from sequence step 3. Reset • Added "[see Section 7.3.18, Reset Electrical Data/Timing]" to sequence step 3. External Warm Reset (RESET pin): • Deleted "for a minimum of 30 DEV Clock cycles" from sequence step 2. • Deleted "for TBD DEV Clock cycles" from sequence step 3.(c). • Added "[see Section 7.3.18, Reset Electrical Data/Timing]" to sequence steps 2. and 3.(c) Table 7-10, Switching Characteristics Over Recommended Operating Conditions During Reset Section 7.3.18 [Cleared E2E Issue]: Reset Electrical • Updated/Changed the MIN/MAX "TBD" parameter values Data/Timing Section 8.5.3.2 Table 8-11, Switching Characteristics Over Recommended Operating Conditions for STM Trace: JTAG Electrical • Updated/Changed all the MIN/MAX "TBD" parameter values Data/Timing 8 Contents Copyright © 2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TMS320DM8148 TMS320DM8147 TMS320DM8146 |
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