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LC86F3448B Datasheet(PDF) 9 Page - Sanyo Semicon Device |
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LC86F3448B Datasheet(HTML) 9 Page - Sanyo Semicon Device |
9 / 21 page LC86F3448B No.A0120-9/21 • Output form and existence of pull-up resistor for all ports can be specified for each bit. • Programmable pull-up resistor is always connected regardless of port option, CMOS or N-ch open drain output in port 1. User Options User options can be changed using Flash Memory data. A kind of option Pin, Circuits Port 0 (Specified in a bit) 1. Input: Without pull-up MOS Tr. Output: N-channel open drain 2. Input: With pull-up MOS Tr. Output: CMOS Input/output form of input/output ports Port 1 (Specified in a bit) 1. Input: With programmable pull-up MOS Tr. Output: N-channel open drain 2. Input: With programmable pull-up MOS Tr. Output: CMOS Notice for Use • Input level of terminal RES at power on Terminal RES must be held low for at least 200µs after the supply voltage exceeds the power supply lower limit. • Difference between the Mask version and Flash version 1. The operation after release of reset: The mask version operates the program from the address 0 in the program counter as soon as detecting the H level on the reset port. The flash version operates the program from the address 0 in the program counter after setting the option. 2. Current dissipation : Please refer to the latest semiconductor news. • Conditions during reset and after release of reset Port options are set using Flash Memory data. Port options are set internally within approximately 3ms after logic HIGH is applied to the RESET terminal. The configuration of the port outputs change over the duration of this period. Then the Program Counter is set to 0 and program execution begins. During reset, and in the few hundred milliseconds after reset is released, the port options on certain of the ports will not yet have been set. The conditions of the various ports during reset or on release of reset have been collected in the following table. Please refer to it when analyzing circuits where these conditions apply. Power supply RES 200 µs or more VDD limit 0V |
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