Rev. 1.00

7 of 35

May 27, 2011

32-bit ARM Cortex™-M3 MCU

HT32F1251/51B/52/53

Core

The Cortex™-M3 processor is a general-purpose 32-bit processor core especially suitable for

products requiring high performance and low power consumption microcontrollers. It offers many

new features such as a Thumb-2 instruction set, hardware divider, low latency interrupt respond

time, atomic bit-banding access and multiple buses for simultaneous accesses. The Cortex™-M3

processor is based on the ARMv7 architecture and supports both Thumb and Thumb-2 instruction

sets. Some system peripherals listed below are also provided by Cortex™-M3:

(PPB) and debug accesses (AHB-AP)

On-chip Memory

buses to fetch instructions and load/store data. The instruction code and data are both located in the

same memory address space but in different address ranges. The maximum address range of the

Cortex™-M3 is 4 GB since it has a 32-bit bus address width. Additionally, a pre-defined memory

map is provided by the Cortex™-M3 processor to reduce the software complexity of repeated

for more information. The Figure 2. HT32F125x Memory Map shows the memory map of the

HT32F125x series of devices, including Code, SRAM, peripheral, and other pre-defined regions.