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HT82B42RE Datasheet(PDF) 9 Page - Holtek Semiconductor Inc |
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HT82B42RE Datasheet(HTML) 9 Page - Holtek Semiconductor Inc |
9 / 86 page Rev. 1.00 8 October 27, 2011 Rev. 1.00 9 October 27, 2011 HT82B42R/HT82B42RE I/O MCU with USB Interface Pin Description ThepinsonthisdevicecanbereferencedbytheirPortname,e.g.PA.0,PA.1etc.,whichrefertothe digitalI/Ofunctionofthepins.HoweverthesePortpinsarealsosharedwithotherfunctionsuchas theTimers,SerialPortpinsetc..Thefunctionofeachpinislistedinthefollowingtable,however thedetailsbehindhoweachpinisconfigurediscontainedinothersectionsofthedatasheet. HT82B42R Pin Name Function OPT I/T O/T Description PA0 PA0 CO ST NMOS /CMOS /PMOS General purpose I/O. Configuration option enabled pull-up, wake-up, VDD or 3.3V voltage output and output structure, which can be selected as CMOS, NMOS or PMOS. PA1/SDI PA1 CO ST NMOS /CMOS /PMOS General purpose I/O. Configuration option enabled pull-up, wake-up, VDD or 3.3V voltage output and output structure, which can be selected as CMOS, NMOS or PMOS. SDI ― ST ― SPI Data input PA2/SDO PA2 CO ST NMOS /CMOS /PMOS General purpose I/O. Configuration option enabled pull-up, wake-up, VDD or 3.3V voltage output and output structure, which can be selected as CMOS, NMOS or PMOS. SDO ― ― CMOS SPI Data output PA3/SCK PA3 CO ST NMOS /CMOS /PMOS General purpose I/O. Configuration option enabled pull-up, wake-up, VDD or 3.3V voltage output and output structure, which can be selected as CMOS, NMOS or PMOS. SCK ― ST CMOS SPI Serial Clock PA4/SCS PA4 CO ST NMOS /CMOS /PMOS General purpose I/O. Configuration option enabled pull-up, wake-up, VDD or 3.3V voltage output and output structure, which can be selected as CMOS, NMOS or PMOS. SCS ― ST ― SPI Slave select PA5 PA5 CO ST NMOS /CMOS /PMOS General purpose I/O. Configuration option enabled pull-up, wake-up, output structure and VDD or 3.3V voltage output. The output structure can be selected as CMOS, NMOS or PMOS. PA6/TMR0 PA6 CO ST NMOS /CMOS /PMOS General purpose I/O. Configuration option enabled pull-up, wake-up, output structure and VDD or 3.3V voltage output. The output structure can be selected as CMOS, NMOS or PMOS. TMR0 ― ST ― Timer 0 External input PA7/TMR1 PA7 CO ST NMOS /CMOS /PMOS General purpose I/O. Configuration option enabled pull-up, wake-up, output structure and VDD or 3.3V voltage output. The output structure can be selected as CMOS, NMOS or PMOS. TMR1 ― ST ― Timer 1 External input PB0~PB3 PB0~PB3 CO ST CMOS General purpose I/O. Configuration option enabled pull-up and wake-up. PE0~PE1 PE0~PE1 CO ST CMOS General purpose I/O. Configuration option enabled pull-up and wake-up. PE2/RES PE2 CO ST NMOS General purpose I/O. Configuration option wake-up. RES CO ST ― Reset input UDN/DATA UDN ― ST CMOS USB D- line DATA ― ST NMOS PS2 Data line UDP/CLK UDP ― ST CMOS USB D+ line CLK ― ST NMOS PS2 CLK line VDD VDD ― PWR ― Power supply VSS VSS ― PWR ― Ground V33O V33O ― ― PWR 3.3V regulator output |
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