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MAX15070A Datasheet(PDF) 7 Page - Maxim Integrated Products |
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MAX15070A Datasheet(HTML) 7 Page - Maxim Integrated Products |
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7 / 9 page  7A Sink, 3A Source, 12ns, SOT23 MOSFET Drivers 7 Detailed Description Logic Inputs The MAX15070A/MAX15070Bs’ logic inputs are pro- tected against voltage spikes up to +16V, regardless of the V+ voltage. The low 10pF input capacitance of the inputs reduces loading and increases switching speed. These ICs have two inputs that give the user greater flexibility in controlling the MOSFET. Table 1 shows all possible input combinations. The difference between the MAX15070A and the MAX15070B is the input threshold voltage. The MAX15070A has TTL logic-level thresholds, while the MAX15070B has HNM (CMOS-like) logic-level thresholds (see the Electrical Characteristics). Connect IN+ to V+ or IN- to GND when not used. Alternatively, the unused input can be used as an on/off control input (Table 1). Undervoltage Lockout (UVLO) When V+ is below the UVLO threshold, the n-channel is on and the p-channel is off, independent of the state of the inputs. The UVLO is typically 3.45V with 200mV typi- cal hysteresis to avoid chattering. A typical falling delay of 2Fs makes the UVLO immune to narrow negative tran- sients in noisy environments. Driver Outputs The ICs provide two separate outputs. One is an open- drain p-channel, the other an open-drain n-channel. They have distinct current sourcing/sinking capabilities to inde- pendently control the rise and fall times of the MOSFET gate. Add a resistor in series with P_OUT/N_OUT to slow the corresponding rise/fall time of the MOSFET gate. Figure 1. Timing Diagram and Test Circuit Table 1. Truth Table L = Logic-low, H = Logic-high. IN+ VIL 90% 10% tD-OFF P_OUT AND N_OUT CONNECTED TOGETHER tD-ON tF tR IN+ IN- V+ V+ CL N_OUT GND P_OUT TEST CIRCUIT TIMING DIAGRAM INPUT OUTPUT VIH MAX15070A MAX15070B IN+ IN- p-CHANNEL n-CHANNEL L L Off On L H Off On H L On Off H H Off On |
Similar Part No. - MAX15070A |
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Similar Description - MAX15070A |
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