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TAS5630PHD Datasheet(PDF) 3 Page - Texas Instruments |
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TAS5630PHD Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 35 page  TAS5630 www.ti.com SLES220B – JUNE 2009 – REVISED FEBRUARY 2010 MODE SELECTION PINS MODE PINS OUTPUT ANALOG INPUT DESCRIPTION CONFIGURATION M3 M2 M1 0 0 0 Differential 2 × BTL AD mode 0 0 1 — — Reserved 0 1 0 Differential 2 × BTL BD mode Differential 0 1 1 1 × BTL +2 ×SE BD mode, BTL differential single-ended 1 0 0 Single-ended 4 × SE AD mode INPUT_C (1) INPUT_D (1) 1 0 1 Differential 1 × PBTL 0 0 AD mode 1 0 BD mode 1 1 0 Reserved 1 1 1 (1) INPUT_C and D are used to select between a subset of AD and BD mode operations in PBTL mode (1=VREG and 0=AGND). PACKAGE HEAT DISSIPATION RATINGS (1) PARAMETER TAS5630PHD TAS5630DKD RqJC (°C/W) – 2 BTL or 4 SE channels 2.63 1.4 RqJC (°C/W) – 1 BTL or 2 SE channel(s) 4.13 2.04 RqJC (°C/W) – 1 SE channel 6.45 3.45 Pad area (2) 64 mm2 80 mm2 (1) RqJC is junction-to-case, RqCH is case-to-heat sink (2) RqCH is an important consideration. Assume a 2-mil (0.051-mm) thickness of thermal grease with a thermal conductivity of 2.5 W/mK between the pad area and the heat sink and both channels active. The RqCH with this condition is 1.1°C/W for the PHD package and 0.44°C/W for the DKD package. Table 1. ORDERING INFORMATION(1) TA PACKAGE DESCRIPTION 0°C–70°C TAS5630PHD 64-pin HTQFP 0°C–70°C TAS5630DKD 44-pin PSOP3 (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. Copyright © 2009–2010, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): TAS5630 |
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