BFP 405

Semiconductor Group

Sep-09-1998

5

For non-linear simulation:

• Use transistor chip parameters in Berkeley SPICE 2G.6 syntax for all simulators.

• If you need simulation of thereverse characteristics, add the diode with the

C’-E’- diode data between collector and emitter.

• Simulation of package is not necessary for frequenties < 100MHz.

For higher frequencies add the wiring of package equivalent circuit around the

non-linear transistor and diode model.

Note:

• This transistor is constructed in a common emitter configuration. This feature causes

an additional reverse biased diode between emitter and collector, which does not

effect normal operation.

EHA07307

C

EE

B

Transistor Schematic Diagram

The common emitter configuration shows the following advantages:

• Higher gain because of lower emitter inductance.

• Power is dissipated via the grounded emitter leads, because the chip is mounted

on copper emitter leadframe.

Please note, that the broadest lead is the emitter lead.

The AC characteristics are verified by random sampling.

Semiconductor Group

5

1998-11-01