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SN65HVD37D Datasheet(PDF) 2 Page - Texas Instruments |
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SN65HVD37D Datasheet(HTML) 2 Page - Texas Instruments |
2 / 16 page SN65HVD37 SLLSE92 A – OCTOBER 2011 – REVISED NOVEMBER 2011 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ABSOLUTE MAXIMUM RATINGS (1) VALUE/UNITS VCC Supply voltage –0.5 V to 7 V Voltage range at A, B, Y, Z pins –13 V to 13 V Input voltage range at any logic pin –0.3 V to 5.7 V Voltage range, transient pulse, A, B, Y, Z, through 100 Ω –25 V to 25 V Receiver output current –24 mA to 24 mA TJ Junction temperature 170 °C Continuous total power dissipation (see Thermal Table) IEC 60749-26 ESD (Human Body Model), bus terminals and GND ±16 kV Test Method A114 (Human Body Model), all pins ±5 kV JEDEC Standard 22 Test Method C101 (Charged Device Model), all pins ±1.5 kV JEDEC Standard 22 Test Method A115 (Machine Model), all pins ±150 V (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions " is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. THERMAL INFORMATION SN65HVD37 THERMAL METRIC(1) D UNITS 14 PINS θJA Junction-to-ambient thermal resistance 79.3 θJCtop Junction-to-case (top) thermal resistance 44.8 θJB Junction-to-board thermal resistance 33.5 °C/W ψJT Junction-to-top characterization parameter 13.3 ψJB Junction-to-board characterization parameter 33.3 (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. RECOMMENDED OPERATING CONDITIONS MIN NOM MAX UNIT VCC Supply voltage(1) 3 3.3 3.6 V VI Input voltage at any bus terminal (separately or common mode)(2) –7 12 V VIH High-level input voltage (Driver, driver enable, and receiver enable inputs) 2 VCC V VIL Low-level input voltage (Driver, driver enable, and receiver enable inputs) 0 0.8 V VID Differential input voltage –12 12 V Driver –60 60 IO Output current mA Receiver –8 8 RL Differential load resistance 54 60 Ω CL Differential load capacitance 50 pF Signaling rate HVD37 20 Mbps TA Operating free-air temperature (See application section for thermal information) –40 85 °C TJ Junction Temperature –40 150 °C (1) Both pins 13 and 14 should be connected to the supply voltage; both pins 6 and 7 should be connected to ground. (2) The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet. 2 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): SN65HVD37 |
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