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Q67040-A4226-A2 Datasheet(PDF) 7 Page - Siemens Semiconductor Group |
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Q67040-A4226-A2 Datasheet(HTML) 7 Page - Siemens Semiconductor Group |
7 / 9 page Semiconductor Group 7 Jul-30-1996 BUP 314D Typ. gate charge V GE = ƒ(QGate) parameter: IC puls = 25 A 0 20 40 60 80 100 120 140 nC 170 Q Gate 0 2 4 6 8 10 12 14 16 V 20 V GE 800 V 600 V Typ. capacitances C = f (VCE) parameter: VGE = 0 V, f = 1 MHz 0 5 10 15 20 25 30 V 40 V CE -2 10 -1 10 0 10 1 10 nF C Ciss Coss Crss Short circuit safe operating area ICsc = f (VCE) , Tj = 150°C parameter: VGE = ± 15 V, tsc ≤ 10 µs, L < 25 nH 0 200 400 600 800 1000 1200 V 1600 V CE 0 2 4 6 10 I Csc/ I C(90°C) Reverse biased safe operating area ICpuls = f (VCE) , Tj = 150°C parameter: VGE = 15 V 0 200 400 600 800 1000 1200 V 1600 V CE 0.0 0.5 1.0 1.5 2.5 I Cpuls/ I C |
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