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AK4160 Datasheet(PDF) 4 Page - Asahi Kasei Microsystems

Part # AK4160
Description  16-channel Capacitive Touch Sensor IC
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Manufacturer  AKM [Asahi Kasei Microsystems]
Direct Link  http://www.akm.com
Logo AKM - Asahi Kasei Microsystems

AK4160 Datasheet(HTML) 4 Page - Asahi Kasei Microsystems

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[AK4160]
MS1313-E-01
2011/11
- 4 -
PIN/FUNCTION
Pin No.
Pin Name
Type
(Note 1)
I/O
(Note 2)
Function
Reset State
RSTN pin = “L”
1
IRQ0N / GPIOA
D
I/O
Interrupt Bit0 / GPIO PinA
Hi-z (Input)
2
IRQ1N / GPIOB
D
I/O
Interrupt Bit1 / GPIO PinB
Hi-z (Input)
3
IRQ2N / GPIOC
D
I/O
Interrupt Bit2 / GPIO PinC
Hi-z (Input)
4
AD0
D
I
I2C Slave Address Bit 0
-
5
SCL
D
I
I2C Serial Clock Input
-
6
AD1
D
I
I2C Slave Address Bit 1
-
7
SDA
D
I/O
I2C Serial Data Input/ Output
Hi-z (Input)
8
RSTN
D
I
Reset Pin
Internal pull-up by 100kΩ (typ)
-
9
VREG
D
O
Internal Regulator Output
Current must not be taken from this pin.
A 47nF ± 20% capacitor should be connected
between this pin and VSS.
Output
10
VSS
GND
-
Ground
-
11
RREF
A
I
Reference Resistor Input
A 100kΩ ± 1% resistor should be connected
between this pin and VSS.
Hi-z (Open)
12
CS0
A
I/O
Cap Sense Pin0
L
13
CS1
A
I/O
Cap Sense Pin1
L
14
CS2
A
I/O
Cap Sense Pin2
L
15
CS3
A
I/O
Cap Sense Pin3
L
16
CS4
A
I/O
Cap Sense Pin4
L
17
CS5
A
I/O
Cap Sense Pin5
L
18
CS6
A
I/O
Cap Sense Pin6
L
19
CS7
A
I/O
Cap Sense Pin7
Hi-z (Open)
(Note 5)
20
CS8 / GPIO7
A/D
I/O
Cap Sense Pin8 / GPIO Pin7
Hi-z (Input)
21
CS9 / GPIO6
A/D
I/O
Cap Sense Pin9 / GPIO Pin6
Hi-z (Input)
22
CS10 / GPIO5
A/D
I/O
Cap Sense Pin10 / GPIO Pin5
Hi-z (Input)
23
CS11 / GPIO4
A/D
I/O
Cap Sense Pin11 / GPIO Pin4
Hi-z (Input)
24
CS12 / GPIO3
A/D
I/O
Cap Sense Pin12 / GPIO Pin3
Hi-z (Input)
25
CS13 / GPIO2
A/D
I/O
Cap Sense Pin13 / GPIO Pin2
Hi-z (Input)
26
CS14 / GPIO1
A/D
I/O
Cap Sense Pin14 / GPIO Pin1
Hi-z (Input)
27
CS15 / GPIO0
A/D
I/O
Cap Sense Pin15 / GPIO Pin0
Hi-z (Input)
28
VDD
PWR
-
Power Supply : 1.71V ~ 3.6V
-
Note 1. A (Analog terminal), D (Digital terminal), GND (Ground), PWR (Power)
Note 2. I (Input terminal), O (Output terminal)
Note 3. All digital input pins ( AD0, AD1, SCL, SDA) must not be allowed to float.
Note 4. When GPIO pins (GPIOA ~ GPIOC, GPIO0 ~ GPIO7) are configured to digital inputs without internal pull
resistor, the pins must not be left floating.
Note 5. Outputs “L” after releasing a reset.
Handling of Unused Pins
The unused I/O pins must be connected appropriately.
Classification
Pin Name
Setting
Digital
IRQ0N / GPIOA ~ IRQ2N / GPIOC
This pin must be configured with internal
pull-up/down resistor or be connected to
VSS or VDD.
Analog
CS0 ~ CS7
This pin must be open.
Analog/Digital
CS8 / GPIO7 ~ CS15 / GPIO0
This pin must be configured with internal
pull-down resistor or be connected to
VSS.


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