[AK4204]

Rev. 0.1

2012/02

- 8 -

The audio circuit of the AK4204 is powered-up when the APDN pin becomes “H”.

(Note) The charge pump starts operation when the APDN pin or VPDN pin is “H”.

The figure below shows an example of when the VPDN pin becoes “H” before the APDN pin.

VPDN: “L” ⇒“H” (Note)

Power up

VEE=Negative voltage

time A

(2)

(a)

(b)

LOUT/ROUT

3.0V

Power Supply

VDD1, VDD2

Audio Timer

Circuit

Charge Pump

VEE

(1)

Power down VEE=0V

LINP/RINP

-1.85V

APDN

Audio Input Signal

Mute=0V

Hi-Z

Mute=0V

Figure 6. System Reset Diagram

(1) When VDD1 and VDD2 are powered-up, audio analog output is connected to VSS internally via a mute switch.

The charge pump is powered-up in slow start mode, and the VEE voltage reachs -1.85V in 0.4ms.

(2) When the VEE reachs -1.85V, the audio timer circuit starts counting the “timeA” period (max. 15ms). If the APDN

pin becomes “H” before the “timeA” period starts (a), the mute switch is released after the “timeA” period and the

audio output is enabled. If the APDN pin becomes “H” after the “timeA” period (b), mute is released immediately.

(3) No audible click noise occurs by inputting 0V to the LINP/RINP pin until the end of “timeA” period.