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BH616UV8011TIG55 Datasheet(PDF) 2 Page - Brilliance Semiconductor |
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BH616UV8011TIG55 Datasheet(HTML) 2 Page - Brilliance Semiconductor |
2 / 11 page BH616UV8011 R0201-BH616UV8011 Revision 1.2 Oct. 2008 2 PIN DESCRIPTIONS Name Function A0-A18 Address Input These 19 address inputs select one of the 524,288 x 16 bit in the RAM CE1 Chip Enable 1 Input CE2 Chip Enable 2 Input CE1 is active LOW and CE2 is active HIGH. Both chip enables must be active when data read from or write to the device. If either chip enable is not active, the device is deselected and is in standby power mode. The DQ pins will be in the high impedance state when the device is deselected. WE Write Enable Input The write enable input is active LOW and controls read and write operations. With the chip selected, when WE is HIGH and OE is LOW, output data will be present on the DQ pins; when WE is LOW, the data present on the DQ pins will be written into the selected memory location. OE Output Enable Input The output enable input is active LOW. If the output enable is active while the chip is selected and the write enable is inactive, data will be present on the DQ pins and they will be enabled. The DQ pins will be in the high impendence state when OE is inactive. LB and UB Data Byte Control Input Lower byte and upper byte data input/output control pins. DQ0-DQ15 Data Input/Output Ports 16 bi-directional ports are used to read data from or write data into the RAM. VCC Power Supply VSS Ground TRUTH TABLE MODE CE1 CE2 WE OE LB UB DQ0~DQ7 DQ8~DQ15 VCC CURRENT H X X X X X High Z High Z ICCSB, ICCSB1 X L X X X X High Z High Z ICCSB, ICCSB1 Chip De-selected (Power Down) X X X X H H High Z High Z ICCSB, ICCSB1 L H H H L X High Z High Z ICC Output Disabled L H H H X L High Z High Z ICC L L DOUT DOUT ICC H L High Z DOUT ICC Read L H H L L H DOUT High Z ICC L L DIN DIN ICC H L X DIN ICC Write L H L X L H DIN X ICC NOTES: H means VIH; L means VIL; X means don’t care (Must be VIH or VIL state) |
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