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PA7468G-S16-R Datasheet(PDF) 2 Page - Unisonic Technologies |
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PA7468G-S16-R Datasheet(HTML) 2 Page - Unisonic Technologies |
2 / 6 page PA7468 Preliminary CMOS IC UNISONICTECHNOLOGIESCO.,LTD 2 of 6 www.unisonic.com.tw QW-R502-322.b PIN CONFIGURATION 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 MUTE SHUTDOWN RIN- BYPASS GND LIN- VOLUME VOLMAX LOUT- VDD LOUT + GND SE/BTL ROUT+ VDD ROUT- PIN DESCRIPTION PIN NO. PIN NAME DESCRIPTION 1 MUTE Input pin for mute controlling: low for normal operation; high to mute. 2 SHUTDOWN When this pin is pulled low the chip will be into shutdown mode. ISD= 1μA 3 RIN- Right channel input pin 4 BYPASS Pin for bias voltage generator 5.12 GND Ground 6 LIN- Left channel input pin 7 VOLUME Volume gain setting input signal. 8 VOLMAX Pin for setting the maximum output swing. Inputting VC to this pin, the output voltage swing will be clamped between VOH- VC & VOL + VC. Connecting GND to this pin will disable the function. For this pin, the max input voltage must be ≤1/2 VDD. 9 LOUT- Left channel’s negative output in BTL mode; high impedance in SE mode. 10, 15 VDD Supply voltage 11 LOUT+ Left channel’s positive output in BTL mode and SE mode 13 SE/ BTL Output mode control input, high :SE output mode ,low :for BTL mode. 14 ROUT+ Right channel’s positive output in BTL mode and SE mode 16 ROUT- Right channel’s negative output in BTL mode ;high impedance in SE mode. |
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