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PSB2120 Datasheet(PDF) 6 Page - Siemens Semiconductor Group |
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PSB2120 Datasheet(HTML) 6 Page - Siemens Semiconductor Group |
6 / 20 page Semiconductor Group 6 Functional Description The reference provides a 4.0 V voltage for the regulation loop. A high gain error amplifier compares the reference voltage with the switch mode supply output voltage. The output of the error amplifier is compared with a periodic linear ramp, which is generated by the sawtooth-oscillator circuit. The comparator output is a fixed-frequency, variable pulse width logic signal, which passes through logic circuits to the high voltage power-switching-FET. A digital current limiting device suppresses the PWM logic signal when the voltage difference at the current limit sense input reaches 100 mV. In this case the control logic inhibits double pulses during one oscillator period. Start-Up Procedure Before the switched-mode DC/DC-converter starts, a sequence of several conditions has to be passed in order to avoid any system malfunction. The primary undervoltage detection inhibits the converter function. This insures that all control functions have stabilized in the proper state when the turn on voltage (ca. 10 V) is reached, and it prevents start-up glitches. In case of connecting the TE to powered lines or if a line is powered up, the charge current of the primary buffer capacitor is limited by an external resistor (figure 2). This resistor is short-circuited by the PSB 2120 when the voltage drop across it falls below approximately 2.0 V. The residual resistance of this short-circuit is about 3 Ω. In case of a primary undervoltage detection the short-circuit will be always deactivated. So, the DC/DC-converter does not start until the charging of the primary buffer capacitor is completed, and the maximum line input voltage is reached. If this feature is not desired, C IN has to be connected to GND. In this case the primary current measuring circuit turns off, to reduce chip-power dissipation from 9 mW to 6 mW. In order to avoid high current peaks during the charging of the secondary capacitors or line capacitors in case of supplying an S-interface, a soft start circuit is implemented in the PSB 2120. This circuit requires an external capacitor, connected between C SS and GND. In addition, the enable input (ENA) allows an external switch-on/switch-off control. If the DC/DC- converter is disabled via ENA, the soft-start-capacitor at pin C SS is discharged. This input can also be used for several other functions, e.g. secondary overvoltage protection. PSB 2120 |
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