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AD9634BCPZ-210 Datasheet(PDF) 10 Page - Analog Devices |
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AD9634BCPZ-210 Datasheet(HTML) 10 Page - Analog Devices |
10 / 32 page AD9634 Rev. 0 | Page 10 of 32 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 24 CSB 23 SCLK 22 SDIO 21 DCO+ 20 DCO– 19 D10+/D11+ (MSB) 18 D10–/D11– (MSB) 17 DRVDD 1 2 3 4 5 6 7 8 CLK+ CLK– AVDD OR– OR+ D0–/D1– (LSB) D0+/D1+ (LSB) DRVDD AD9634 TOP VIEW (Not to Scale) NOTES 1. DNC = DO NOT CONNECT. DO NOT CONNECT TO THIS PIN. 2. THE EXPOSED THERMAL PADDLE ON THE BOTTOM OF THE PACKAGE PROVIDES THE ANALOG GROUND FOR THE PART. THIS EXPOSED PADDLE MUST BE CONNECTED TO GROUND FOR PROPER OPERATION. Figure 3. Pin Configuration Table 8. Pin Function Descriptions Pin No. Mnemonic Type Description ADC Power Supplies 8, 17 DRVDD Supply Digital Output Driver Supply (1.8 V Nominal). 3, 27, 28, 31, 32 AVDD Supply Analog Power Supply (1.8 V Nominal). 0 AGND, Exposed Paddle Ground Analog Ground. The exposed thermal paddle on the bottom of the package provides the analog ground for the part. This exposed paddle must be connected to ground for proper operation. 25 DNC Do No Connect. Do not connect to this pin. ADC Analog 30 VIN+ Input Differential Analog Input Pin (+). 29 VIN− Input Differential Analog Input Pin (−). 26 VCM Output Common-Mode Level Bias Output for Analog Inputs. This pin should be decoupled to ground using a 0.1 μF capacitor. 1 CLK+ Input ADC Clock Input—True. 2 CLK− Input ADC Clock Input—Complement. Digital Outputs 5 OR+ Output Overrange—True. 4 OR− Output Overrange—Complement. 7 D0+/D1+ (LSB) Output DDR LVDS Output Data 0/Data 1—True (LSB). 6 D0−/D1− (LSB) Output DDR LVDS Output Data 0/Data 1—Complement (LSB). 10 D2+/D3+ Output DDR LVDS Output Data 2/Data 3—True. 9 D2−/D3− Output DDR LVDS Output Data 2/Data 3—Complement. 12 D4+/D5+ Output DDR LVDS Output Data 4/Data 5—True. 11 D4−/D5− Output DDR LVDS Output Data 4/Data 5—Complement. 14 D6+/D7+ Output DDR LVDS Output Data 6/Data 7—True. 13 D6−/D7− Output DDR LVDS Output Data 6/Data 7—Complement. 16 D8+/D9+ Output DDR LVDS Output Data 8/Data 9—True. 15 D8−/D9− Output DDR LVDS Output Data 8/Data 9—Complement. 19 D10+/D11+ (MSB) Output DDR LVDS Output Data 10/Data 11—True (MSB). 18 D10−/ D11− (MSB) Output DDR LVDS Output Data 10/Data 11—Complement (MSB). 21 DCO+ Output LVDS Data Clock Output—True. 20 DCO− Output LVDS Data Clock Output—Complement. |
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