ADS4145 datasheet(11/61 Pages) TI

Part #	ADS4145

Description	12-Bit, 200-MSPS, Ultralow-Power ADC

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Manufacturer	TI [Texas Instruments]

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ADS4128

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SBAS578 – MAY 2012

Pin Assignments (CMOS Mode)

PIN NAME

PIN NUMBER

PINS

FUNCTION

DESCRIPTION

AGND

9, 12, 14, 17, 19, 25

6

I

Analog ground

AVDD

8, 18, 20, 22, 24, 26

6

I

1.8-V analog power supply

CLKM

11

1

I

Differential clock input, negative

CLKOUT

5

1

O

CMOS output clock

CLKP

10

1

I

Differential clock input, positive

D0

Refer to Figure 2

1

O

12-bit CMOS output data

D1

Refer to Figure 2

1

O

12-bit CMOS output data

D2

Refer to Figure 2

1

O

12-bit CMOS output data

D3

Refer to Figure 2

1

O

12-bit CMOS output data

D4

Refer to Figure 2

1

O

12-bit CMOS output data

D5

Refer to Figure 2

1

O

12-bit CMOS output data

D6

Refer to Figure 2

1

O

12-bit CMOS output data

D7

Refer to Figure 2

1

O

12-bit CMOS output data

D8

Refer to Figure 2

1

O

12-bit CMOS output data

D9

Refer to Figure 2

1

O

12-bit CMOS output data

D10

Refer to Figure 2

1

O

12-bit CMOS output data

D11

Refer to Figure 2

1

O

12-bit CMOS output data

Data format select input. This pin sets the DATA FORMAT (twos complement or offset

DFS

6

1

I

binary) and the LVDS and CMOS output interface type. See Table 8 for detailed

information.

DRGND

1, 36, PAD

2

I

Digital and output buffer ground

DRVDD

2, 35

2

I

1.8-V digital and output buffer supply

INP

15

1

I

Differential analog input, positive

INM

16

1

I

Differential analog input, negative

NC

Refer to Figure 2

5

—

Do not connect

Output buffer enable input, active high; this pin has an internal 180-k

Ω pull-up resistor to

OE

7

1

I

DRVDD.

This pin functions as an out-of-range indicator after reset when register bit

OVR_SDOUT

3

1

O

READOUT = 0, and functions as a serial register readout pin when READOUT = 1.

Serial interface RESET input.

When using the serial interface mode, the internal registers must initialize through

hardware RESET by applying a high pulse on this pin or by using the software reset

RESET

30

1

I

option; refer to the Serial Interface section.

When RESET is tied high, the internal registers are reset to the default values. In this

condition, SEN can be used as an analog control pin.

RESET has an internal 180-k

Ω pull-down resistor.

RESERVED

23

1

I

Digital control pin, reserved for future use

This pin functions as a serial interface clock input when RESET is low. When RESET is

SCLK

29

1

I

high, SCLK has no function and should be tied to ground.

This pin has an internal 180-k

Ω pull-down resistor.

This pin functions as a serial interface data input when RESET is low. When RESET is

SDATA

28

1

I

high, SDATA functions as a STANDBY control pin (see Table 10).

This pin has an internal 180-k

Ω pull-down resistor.

This pin functions as a serial interface enable input when RESET is low. When RESET

SEN

27

1

I

is high, SEN has no function and should be tied to AVDD.

This pin has an internal 180-k

Ω pull-up resistor to AVDD.

UNUSED

4

1

—

Unused pin in CMOS mode

Outputs the common-mode voltage (0.95 V) that can be used externally to bias the

VCM

13

1

O

analog input pins.

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