OUT

GND

IN

EN

1

2

4

3

GND

OUT

EN

IN

3

4

2

1

TLV717xx

TLV717xxP

SBVS176A – OCTOBER 2011 – REVISED APRIL 2012

www.ti.com

PIN CONFIGURATION

DQN PACKAGE

DQN PACKAGE

1-mm × 1-mm TBD

1-mm × 1-mm TBD

(Top View)

(Bottom View)

PIN DESCRIPTIONS

PIN

NAME

NO.

DESCRIPTION

Enable pin. Driving EN over 1.2 V turns on the regulator. Driving EN below 0.4 V puts the regulator into shutdown

EN

3

mode.

GND

2

Ground pin

Input pin. A small capacitor is recommended from this pin to ground to assure stability. See the Input and Output

IN

4

Capacitor Requirements section in the Application Information for more details.

Regulated output voltage pin. A small 1-

μF ceramic capacitor is recommended from this pin to ground to assure

OUT

1

stability. See the Input and Output Capacitor Requirements section in the Application Information for more details.

Thermal

—

It is recommended to connect this pin to GND for improved thermal performance.

pad

4

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