 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
TLV70228DSET Datasheet(PDF) 10 Page - Texas Instruments |
|
|
||||||||||||||||||||||||||||||
TLV70228DSET Datasheet(HTML) 10 Page - Texas Instruments |
|
|
10 / 27 page  t = (120 R ) (120+R ) L L · · COUT TLV702xx SLVSAG6B – SEPTEMBER 2010 – REVISED FEBRUARY 2011 www.ti.com APPLICATION INFORMATION The TLV702xx belongs to a new family of BOARD LAYOUT RECOMMENDATIONS TO next-generation value LDO regulators. These devices IMPROVE PSRR AND NOISE PERFORMANCE consume low quiescent current and deliver excellent Input and output capacitors should be placed as line and load transient performance. These close to the device pins as possible. To improve ac characteristics, combined with low noise and very performance such as PSRR, output noise, and good PSRR with little (VIN – VOUT) headroom, make transient response, it is recommended that the board this family of devices ideal for portable RF be designed with separate ground planes for VIN and applications. This family of regulators offers current VOUT, with the ground plane connected only at the limit and thermal protection, and is specified GND pin of the device. In addition, the ground from –40°C to +125°C. connection for the output capacitor should be connected directly to the GND pin of the device. High INPUT AND OUTPUT CAPACITOR ESR capacitors may degrade PSRR performance. REQUIREMENTS 1.0- μF X5R- and X7R-type ceramic capacitors are INTERNAL CURRENT LIMIT recommended because these capacitors have The TLV702xx internal current limit helps to protect minimal variation in value and equivalent series the regulator during fault conditions. During current resistance (ESR) over temperature. limit, the output sources a fixed amount of current However, the TLV702xx is designed to be stable with that is largely independent of the output voltage. In an effective capacitance of 0.1 μF or larger at the such a case, the output voltage is not regulated, and output. Thus, the device is stable with capacitors of is VOUT = ILIMIT × RLOAD. The PMOS pass transistor other dielectric types as well, as long as the effective dissipates (VIN – VOUT) × ILIMIT until thermal shutdown capacitance under operating bias voltage and is triggered and the device turns off. As the device temperature is greater than 0.1 μF. This effective cools, it is turned on by the internal thermal shutdown capacitance refers to the capacitance that the LDO circuit. If the fault condition continues, the device sees under operating bias voltage and temperature cycles between current limit and thermal shutdown. conditions; that is, the capacitance after taking both See the Thermal Information section for more details. bias voltage and temperature derating into The PMOS pass element in the TLV702xx has a consideration. In addition to allowing the use of built-in body diode that conducts current when the lower-cost dielectrics, this capability of being stable voltage at OUT exceeds the voltage at IN. This with 0.1- μF effective capacitance also enables the current is not limited, so if extended reverse voltage use of smaller footprint capacitors that have higher operation is anticipated, external limiting to 5% of the derating in size- and space-constrained applications. rated output current is recommended. NOTE: Using a 0.1- μF rated capacitor at the output of the LDO does not ensure stability because the SHUTDOWN effective capacitance under the specified operating The enable pin (EN) is active high. The device is conditions would be less than 0.1 μF. Maximum ESR enabled when voltage at EN pin goes above 0.9V. should be less than 200 m Ω. This relatively lower value of voltage required to turn Although an input capacitor is not required for the LDO on can be exploited to power the LDO with a stability, it is good analog design practice to connect GPIO of recent processors whose GPIO Logic 1 a 0.1- μF to 1.0-μF, low ESR capacitor across the IN voltage level is lower than traditional microcontrollers. pin and GND pin of the regulator. This capacitor The device is turned off when the EN pin is held at counteracts reactive input sources and improves less than 0.4V. When shutdown capability is not transient response, noise rejection, and ripple required, EN can be connected to the IN pin. rejection. A higher-value capacitor may be necessary The TLV702xxP version has internal active pull-down if large, fast rise-time load transients are anticipated, circuitry that discharges the output with a time or if the device is not located close to the power constant of: source. If source impedance is more than 2 Ω, a 0.1- μF input capacitor may be necessary to ensure stability. where: • RL = Load resistance • COUT = Output capacitor (1) 10 Submit Documentation Feedback © 2010–2011, Texas Instruments Incorporated |
Similar Part No. - TLV70228DSET |
|
Similar Description - TLV70228DSET |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.NET |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
