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GRM188R60J106M Datasheet(PDF) 9 Page - Texas Instruments |
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GRM188R60J106M Datasheet(HTML) 9 Page - Texas Instruments |
9 / 22 page IN,MIN OUT OUT,MAX DS(on) L V V I (R + R ) = + ´ TLV62080 www.ti.com SLVSAK9A – OCTOBER 2011 – REVISED NOVEMBER 2011 DETAILED DESCRIPTION DEVICE OPERATION The TLV62080 synchronous switched mode converter is based on DCS ™ Control (Direct Control with Seamless transition into Power Save Mode). This is an advanced regulation topology that combines the advantages of hysteretic and voltage mode control. The DCS ™ Control topology operates in PWM (Pulse Width Modulation) mode for medium to heavy load conditions and in Power Save Mode at light load currents. In PWM the converter operates with its nominal switching frequency of 2MHz having a controlled frequency variation over the input voltage range. As the load current decreases the converter enters Power Save Mode, reducing the switching frequency and minimizing the IC quiescent current to achieve high efficiency over the entire load current range. DCS ™ Control supports both operation modes (PWM and PFM) using a single building block having a seamless transition from PWM to Power Save Mode without effects on the output voltage. The TLV62080 offers both excellent DC voltage and superior load transient regulation, combined with very low output voltage ripple, minimizing interference with RF circuits. POWER SAVE MODE As the load current decreases the TLV62080 enters the Power Save Mode operation. During Power Save Mode the converter operates with reduced switching frequency in PFM mode and with a minimum quiescent current maintaining high efficiency. The power save mode occurs when the inductor current becomes discontinuous. It is based on a fixed on time architecture. The typical on time is given by ton=210ns·(VIN / VOUT). The switching frequency over the whole load current range is shown in Figure 10. 100% DUTY CYCLE LOW DROPOUT OPERATION The device offers low input to output voltage difference by entering 100% duty cycle mode. In this mode the high side MOSFET switch is constantly turned on and the low side MOSFET is switched off. This is particularly useful in battery powered applications to achieve longest operation time by taking full advantage of the whole battery voltage range. The minimum input voltage to maintain switching regulation, depending on the load current and output voltage can be calculated as: (1) With: VIN,MIN = Minimum input voltage IOUT,MAX = Maximum output current RDS(on) = High side FET on-resistance RL = Inductor ohmic resistance ENABLING / DISABLING THE DEVICE The device is enabled by setting the EN input to a logic HIGH. Accordingly, a logic LOW disables the device. If the device is enabled, the internal power stage will start switching and regulate the output voltage to the programmed threshold. The EN input must be terminated with a resistance less than 1M Ω pulled to VIN or GND. OUTPUT DISCHARGE The output gets discharged by the SW pin with a typical discharge resistor of RDIS whenever the device shuts down. This is the case when the device gets disabled by enable, thermal shutdown trigger, and undervoltage lockout trigger. SOFT START After enabling the device, an internal soft-start circuitry monotonically ramps up the output voltage and reaches the nominal output voltage during a soft start time (100 µs, typical). This avoids excessive inrush current and creates a smooth output voltage rise slope. It also prevents excessive voltage drops of primary cells and rechargeable batteries with high internal impedance. Copyright © 2011, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link(s): TLV62080 |
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