Electronic Components Datasheet Search |
|
TLV71730PDQNR Datasheet(PDF) 4 Page - Texas Instruments |
|
|
TLV71730PDQNR Datasheet(HTML) 4 Page - Texas Instruments |
4 / 23 page OUT GND IN EN 1 2 4 3 GND OUT EN IN 3 4 2 1 TLV717xx TLV717xxP SBVS176A – OCTOBER 2011 – REVISED APRIL 2012 www.ti.com PIN CONFIGURATION DQN PACKAGE DQN PACKAGE 1-mm × 1-mm TBD 1-mm × 1-mm TBD (Top View) (Bottom View) PIN DESCRIPTIONS PIN NAME NO. DESCRIPTION Enable pin. Driving EN over 1.2 V turns on the regulator. Driving EN below 0.4 V puts the regulator into shutdown EN 3 mode. GND 2 Ground pin Input pin. A small capacitor is recommended from this pin to ground to assure stability. See the Input and Output IN 4 Capacitor Requirements section in the Application Information for more details. Regulated output voltage pin. A small 1- μF ceramic capacitor is recommended from this pin to ground to assure OUT 1 stability. See the Input and Output Capacitor Requirements section in the Application Information for more details. Thermal — It is recommended to connect this pin to GND for improved thermal performance. pad 4 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): TLV717xx TLV717xxP |
Similar Part No. - TLV71730PDQNR |
|
Similar Description - TLV71730PDQNR |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |