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AS1153_V2 Datasheet(PDF) 2 Page - ams AG |
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AS1153_V2 Datasheet(HTML) 2 Page - ams AG |
2 / 16 page www.austriamicrosystems.com/Interfaces-LVDS/AS1153 Revision 1.02 2 - 16 AS1153, AS1157 Datasheet - Pinout a nd Packaging 4 Pinout and Packaging Pin Assignments Figure 2. Pin Assignments (Top View) Pin Descriptions Table 1. Pin Descriptions Pin Number Pin Name Description 1IN1- Inverting Differential Receiver Input 2IN1+ Noninverting Differential Receiver Input 3IN2+ Noninverting Differential Receiver Input 4IN2- Inverting Differential Receiver Input 5GND Ground 6OUT2 LVCMOS/LVTTL Receiver Output 7OUT1 LVCMOS/LVTTL Receiver Output 8VCC Power-Supply Input. Bypass VCC to GND with 0.1µF and 0.001µF ceramic capacitors. VCC OUT1 OUT2 GND IN1- IN1+ IN2+ IN2- AS1153/57 1 2 3 4 8 7 6 5 |
Similar Part No. - AS1153_V2 |
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Similar Description - AS1153_V2 |
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