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TPS7A33 Datasheet(PDF) 15 Page - Texas Instruments |
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TPS7A33 Datasheet(HTML) 15 Page - Texas Instruments |
15 / 22 page P =(V V )I - D IN OUT OUT TPS7A33 www.ti.com SBVS169B – DECEMBER 2011 – REVISED MARCH 2012 LAYOUT POWER DISSIPATION The primary TPS7A33 application is to provide ultralow noise voltage rails to high-performance analog circuitry in order to maximize system accuracy and precision. The high-current and high-voltage characteristics of this regulator means that, often enough, high power (heat) is dissipated from the device itself. This heat, if dissipated into the PCB (as is the case with SMT packages), creates a temperature gradient in the surrounding area that causes nearby components to react to this temperature change (drift). In high-performance systems, such drift may degrade overall system accuracy and precision. Compared to surface-mount packages, the TO-220 (KC) package allows for an external heatsink to be used to maximize thermal performance and keep heat from dissipating into the PCB. Power dissipation depends on input voltage and load conditions. Power dissipation (PD) is equal to the product of the output current times the voltage drop across the output pass element, as shown in Equation 2: (2) THERMAL PERFORMANCE AND HEATSINK SELECTION Heat flows from the device to the ambient air through many paths, each of which represents resistance to the heat flow; this is called thermal resistance. The total thermal resistance of a system is defined by: θJA = (TJ – TA)/PD; where: θJA is the thermal resistance (in °C/W), TJ is the allowable juntion temperature of the device (in °C), TA is the maximum temperature of the ambient cooling air (in °C), and PD is the amount of power (heat) dissipated by the device (in W). Whenever a heatsink is installed, the total thermal resistance ( θJA) is the sum of all the individual resistances from the device, going through its case and heatsink to the ambient cooling air ( θJA = θJC + θCS + θSA). Reallistically, only two resistances can be controlled: θCS and θSA. Therefore, for a device with a known θJC, θCS and θSA become the main design variables in selecting a heat sink. The thermal interface between the case and the heat sink ( θCS) is controlled by selecting the correct heat- conducting material. Once the θCS is selected, the required thermal resistance from the heatsink to ambient is calculated by the following equation: θSA = [(TJ – TA)/PD] – [θJC+ θCS]. This information allows the the most appropriate heatsink to be selected for any particular application. PACKAGE MOUNTING The TO-220 (KC) 7-lead, straight-formed package lead spacing poses a challenge when creating a suitable PCB footprint without bending the leads. Component forming pliers, such as Excelta's Q-6482, can be used to manually bend the package leads into a 7-lead stagger pattern with increased lead spacing that can be more easily used. The TPS7A33 evaluation board layout can be used as a guideline on suitable PCB footprints, available at www.ti.com BOARD LAYOUT RECOMMENDATIONS TO IMPROVE PSRR AND NOISE PERFORMANCE To improve ac performance such as PSRR, output noise, and transient response, it is recommended that the board be designed with separate planes for IN, OUT, and GND. The IN and OUT planes should be isolated from each other by a GND plane section. In addition, the ground connection for the output capacitor should connect directly to the GND pin of the device. Equivalent series inductance (ESL) and equivalent series resistance (ESR) must be minimized in order to maximize performance and ensure stability. Every capacitor (CIN, COUT, CNR/SS, CFF) must be placed as close as possible to the device and on the same side of the printed circuit board (PCB) as the regulator itself. Do not place any of the capacitors on the opposite side of the PCB from where the regulator is installed. The use of vias and long traces is strongly discouraged because they may impact system performance negatively and even cause instability. If possible, and to ensure the maximum performance specified in this product datasheet, use the same layout pattern used for the TPS7A33 evaluation board, available at www.ti.com. Copyright © 2011–2012, Texas Instruments Incorporated Submit Documentation Feedback 15 |
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