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MC06XS3517 Datasheet(PDF) 3 Page - Freescale Semiconductor, Inc |
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MC06XS3517 Datasheet(HTML) 3 Page - Freescale Semiconductor, Inc |
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3 / 41 page  Analog Integrated Circuit Device Data Freescale Semiconductor 3 06XS3517 PIN CONNECTIONS PIN CONNECTIONS Figure 3. 06XS3517 Pin Connections Table 1. 06XS3517 Pin Definitions A functional description of each pin can be found in the Functional Pin Description section beginning on Page 17. Pin Number Pin Name Pin Function Formal Name Definition 1 FETIN Input External FET Input This pin receives the current sense signal of the external SMART MOSFET. 2 IGN Input Ignition Input (Active High) This input wakes the device. It also controls the Outputs 1 and 2 in case of Fail mode activation. This pin has an internal pull-down resistor. 3 RSTB Input Reset This input wakes the device. It is also used to initialize the device configuration and fault registers through SPI. This digital pin has a passive internal pull-down. 4 FLASHER Input Flasher Input (Active High) This input wakes the device and allows control over channel 5. (FLASHER) This pin has an internal pull-down resistor. 5 CLOCK Input/Output Clock Input This pin state depends on RSTB logic level. As long as RSTB input pin is set to logic [0], this pin is pulled up to report wake events. Otherwise, the PWM frequency and timing are generated from this digital clock input by the PWM module. This pin has a passive internal pull-down. 6 LIMP Input Limp Home Input (Active High) The Fail mode can be activated by this digital input. This pin has a passive internal pull-down. 7 FOG Input FOG Input (Active high) This input wakes the device. This pin has a passive internal pull-down. 8 CSB Input Chip Select (Active Low) When this digital signal is high, SPI signals are ignored. Asserting this pin low starts a SPI transaction. The transaction is signaled as completed when this signal returns high. This pin has a passive internal pull-up resistance. 13 24 12 10 9 8 7 6 5 4 3 2 1 11 23 22 19 20 21 16 17 18 15 14 CP GND OUT5 OUT4 OUT3 OUT2 OUT1 GND CSNS GND VBAT Transparent Top View |
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