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56F84543VLH Datasheet(PDF) 9 Page - Freescale Semiconductor, Inc |
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56F84543VLH Datasheet(HTML) 9 Page - Freescale Semiconductor, Inc |
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9 / 67 page  1.6.3 Inter-Module Crossbar and AND-OR-INVERT logic • Provides generalized connections between and among on-chip peripherals: ADCs, 12-bit DAC, Comparators, Quad Timers, eFlexPWMs, PDBs, EWM, and select I/O pins • User-defined input/output pins for all modules connected to crossbar • DMA request and interrupt generation from crossbar • Write-once protection for all registers • AND-OR-INVERT function that provides a universal Boolean function generator using a four-term sum-of-products expression, with each product term containing true or complement values of the four selected inputs (A, B, C, D). 1.6.4 Comparator • Full rail-to-rail comparison range • Support for high speed mode and low speed mode • Selectable input source includes external pins and internal DACs • Programmable output polarity • 6-bit programmable DAC as voltage reference per comparator • Three programmable hysteresis levels • Selectable interrupt on rising edge, falling edge, or toggle of comparator output 1.6.5 12-bit Digital-to-Analog Converter • 12-bit resolution • Powerdown mode • Automatic mode allows the DAC to automatically generate pre-programmed output waveforms including square, triangle, and sawtooth waveforms for applications such as slope compensation • Programmable period, update rate, and range • Output can be routed to an internal comparator, ADC, or optionally off chip 1.6.6 Quad Timer • Four 16-bit up/down counters with programmable prescaler for each counter • Operation modes: edge count, gated count, signed count, capture, compare, PWM, signal shot, single pulse, pulse string, cascaded, quadrature decode • Programmable input filter • Counting start can be synchronized across counters Peripheral highlights MC56F8455x Advance Information Data Sheet, Rev. 2, 06/2012. Freescale Semiconductor, Inc. Preliminary 9 General Business Information |
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