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SL4053BN Datasheet(PDF) 2 Page - System Logic Semiconductor

Part # SL4053BN
Description  Analog Multiplexer Demultiplexer
Download  6 Pages
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Manufacturer  SLS [System Logic Semiconductor]
Direct Link  http://www.slsemicon.co.kr/e_index.htm
Logo SLS - System Logic Semiconductor

SL4053BN Datasheet(HTML) 2 Page - System Logic Semiconductor

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SL4053B
System Logic
Semiconductor
SLS
MAXIMUM RATINGS
*
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage (Referenced to GND)
-0.5 to +20
V
VIN
DC Input Voltage (Referenced to GND)
-0.5 to VCC +0.5
V
VOUT
DC Output Voltage (Referenced to GND)
-0.5 to VCC +0.5
V
IIN
DC Input Current, per Pin
±10
mA
PD
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
750
500
mW
PD
Power Dissipation per Output Transistor
100
mW
Tstg
Storage Temperature
-65 to +150
°C
TL
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
260
°C
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/
°C from 65° to 125°C
SOIC Package: : - 7 mW/
°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
VCC
DC Supply Voltage (Referenced to GND)
3.0
18
V
VIN, VOUT
DC Input Voltage, Output Voltage (Referenced to GND)
0
VCC
V
TA
Operating Temperature, All Package Types
-55
+125
°C
I
Multiplexer Switch Input Current Capability
*
-
25
mA
ROH
Output Load Resistance
100
-
* In certain applications, the external load-resistor current may include both V
CC and signal-line components.
This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range
GND
≤(V
IN or VOUT)
≤V
CC.
Unused digital pins must be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused
Analog I/O pins may be left open or terminated.


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