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AD7457BRT-R2 Datasheet(PDF) 1 Page - Analog Devices |
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AD7457BRT-R2 Datasheet(HTML) 1 Page - Analog Devices |
1 / 20 page Low Power, Pseudo Differential, 100 kSPS 12-Bit ADC in an 8-Lead SOT-23 AD7457 Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2005 Analog Devices, Inc. All rights reserved. FEATURES Specified for VDD of 2.7 V to 5.25 V Low power: 0.9 mW max at 100 kSPS with VDD = 3 V 3 mW max at 100 kSPS with VDD = 5 V Pseudo differential analog input Wide input bandwidth: 70 dB SINAD at 30 kHz input frequency Flexible power/serial clock speed management No pipeline delays High speed serial interface—SPI®-/QSPI™-/ MICROWIRE™-/DSP-compatible Automatic power-down mode 8-lead SOT-23 package APPLICATIONS Transducer interface Battery-powered systems Data acquisition systems Portable instrumentation FUNCTIONAL BLOCK DIAGRAM VREF T/H CONTROL LOGIC 12-BIT SUCCESSIVE APPROXIMATION ADC GND SCLK SDATA CS VDD AD7457 VIN+ VIN– Figure 1. GENERAL DESCRIPTION The AD7457 is a 12-bit, low power, successive approximation (SAR) analog-to-digital converter that features a pseudo differential analog input. This part operates from a single 2.7 V to 5.25 V power supply and features throughput rates of up to 100 kSPS. The part contains a low noise, wide bandwidth, differential track-and-hold (T/H) amplifier that can handle input frequen- cies in excess of 1 MHz. The reference voltage for the AD7457 is applied externally to the VREF pin and can range from 100 mV to VDD, depending on what suits the application. The conversion process and data acquisition are controlled using CS and the serial clock, allowing the device to interface with microprocessors or DSPs. The SAR architecture of this part ensures that there are no pipeline delays. The AD7457 uses advanced design techniques to achieve very low power dissipation. PRODUCT HIGHLIGHTS 1. Operation with 2.7 V to 5.25 V power supplies. 2. Low power consumption. With a 3 V supply, the AD7457 offers 0.9 mW maximum power consumption for a 100 kSPS throughput rate. 3. Pseudo differential analog input. 4. Flexible power/serial clock speed management. The conversion rate is determined by the serial clock, allowing the power to be reduced as the conversion time is reduced through the serial clock speed increase. Automatic power- down after conversion allows the average power consump- tion to be reduced. 5. Variable voltage reference input. 6. No pipeline delays. 7. Accurate control of the sampling instant via the CS input and once-off conversion control. 8. ENOB > 10 bits typically with 500 mV reference. |
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