DE

MUX

DA[11:0]

DB[11:0]

MODE

GSET

Latch A

Latch B

12−b DAC

12−b DAC

IOUTA1

IOUTA2

IOUTB1

IOUTB2

1.2 V Reference

WRTB

WRTA

CLKB

CLKA

BIASJ_A

BIASJ_B

EXTIO

DVDD

DGND

AVDD

AGND

SLEEP

DAC5662A

SLAS536B – SEPTEMBER 2007 – REVISED DECEMBER 2010

www.ti.com

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

FUNCTIONAL BLOCK DIAGRAM

AVAILABLE OPTIONS

PACKAGED DEVICES

48-TQFP

DAC5662AIPFB

-40°C to 85°C

DAC5662AIPFBR

2

Submit Documentation Feedback

Copyright © 2007–2010, Texas Instruments Incorporated