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74ACT11138D Datasheet(PDF) 2 Page - Texas Instruments |
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74ACT11138D Datasheet(HTML) 2 Page - Texas Instruments |
2 / 7 page 54ACT11138, 74ACT11138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCAS050A – D3266, JANUARY 1989 – REVISED APRIL 1993 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2–2 logic symbols (alternatives)† BIN/OCT 10 G2B G2A 8 7 6 5 4 3 2 1 0 G1 C B A 7 6 5 3 2 1 16 9 11 13 14 15 EN & 4 2 1 Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 & 15 14 13 11 9 16 1 2 3 5 6 7 A B C G1 0 1 2 3 4 5 6 7 8 10 G 7 0 0 DMUX 2 G2B G2A † These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, J, and N packages. logic diagram (positive logic) G1 G2B G2A C B A 11 9 10 13 14 15 Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 8 7 6 5 3 2 1 16 Data Outputs Select Inputs Enable Inputs Pin numbers shown are for the D, J, and N packages. |
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