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54ACT11534 Datasheet(PDF) 4 Page - Texas Instruments |
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54ACT11534 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 7 page 54ACT11534, 74ACT11534 OCTAL DTYPE EDGETRIGGERED FLIPFLOPS WITH 3STATE OUTPUTS SCAS038A − D2957, JULY 1987 − REVISED APRIL 1993 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 2−4 timing requirements over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 1) TA = 25°C 54ACT11534 74ACT11534 UNIT MIN MAX MIN MAX MIN MAX UNIT fclock Clock frequency 0 55 0 55 0 55 MHz tw Pulse duration, CLK low or CLK high 9 9 9 ns tsu Setup time, data before CLK ↑ 3 3 3 ns th Hold time, data after CLK ↑ 5.5 5.5 5.5 ns switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 1) PARAMETER FROM TO TA = 25°C 54ACT11534 74ACT11534 UNIT PARAMETER FROM (INPUT) TO (OUTPUT) MIN TYP MAX MIN MAX MIN MAX UNIT fmax 55 70 55 55 MHz tPLH CLK Any Q 1.5 8.5 12.7 1.5 15.7 1.5 14.5 ns tPHL CLK Any Q 1.5 8.5 13.3 1.5 16.3 1.5 15 ns tPZH OC Any Q 1.5 7.5 12 1.5 14.2 1.5 13.3 ns tPZL OC Any Q 1.5 7.5 12.2 1.5 14.5 1.5 13.5 ns tPHZ OC Any Q 1.5 11 12.9 1.5 13.9 1.5 13.5 ns tPLZ OC Any Q 1.5 8 11.2 1.5 12.5 1.5 12 ns operating characteristics, VCC = 5 V, TA = 25°C PARAMETER TEST CONDITIONS TYP UNIT Cpd Power dissipation capacitance per flip-flop Outputs enabled CL = 50 pF, f = 1 MHz 92 pF Cpd Power dissipation capacitance per flip-flop Outputs disabled CL = 50 pF, f = 1 MHz 82 pF |
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