Output Code + 2048(PGA)

V

V

DD

ADS1000-Q1

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SBAS480A – SEPTEMBER 2009 – REVISED AUGUST 2010

THEORY OF OPERATION

The ADS1000 is a fully differential, 12-bit A/D converter. The ADS1000 allows users to obtain precise

measurements with a minimum of effort, and the device is extremely easy to design with and configure.

Each of these blocks are described in detail in the sections that follow.

ANALOG-TO-DIGITAL CONVERTER

The ADS1000 uses a switched-capacitor input stage. To external circuitry, it looks roughly like a resistance. The

resistance value depends on the capacitor values and the rate at which they are switched. The switching clock is

generated by the onboard clock generator, so its frequency, nominally 275kHz, is dependent on supply voltage

and temperature. The capacitor values depend on the PGA setting.

The common-mode and differential input impedances are different. For a gain setting of PGA, the differential

input impedance is typically 2.4M

Ω/PGA.

The common-mode impedance is typically 8M

Ω.

OUTPUT CODE CALCULATION

The ADS1000 outputs codes in binary two’s complement format. The output code is confined to the range of

numbers: –2048 to 2047, and is given by:

CLOCK GENERATOR

The ADS1000 features an onboard clock generator. The Typical Characteristics show variations in data rate over

supply voltage and temperature. It is not possible to operate the ADS1000 with an external clock.

USING THE ADS1000

OPERATING MODES

The ADS1000 operates in one of two modes: continuous conversion and single conversion.

In continuous conversion mode, the ADS1000 continuously performs conversions. Once a conversion has been

completed, the ADS1000 places the result in the output register, and immediately begins another conversion.

When the ADS1000 is in continuous conversion mode, the ST/BSY bit in the configuration register always reads

1.

In single conversion mode, the ADS1000 waits until the ST/BSY bit in the conversion register is set to 1. When

this happens, the ADS1000 powers up and performs a single conversion. After the conversion completes, the

ADS1000 places the result in the output register, resets the ST/BSY bit to 0 and powers down. Writing a 1 to

ST/BSY while a conversion is in progress has no effect.

When switching from continuous conversion mode to single conversion mode, the ADS1000 will complete the

current conversion, reset the ST/BSY bit to 0 and power-down the device.

RESET AND POWER-UP

When the ADS1000 powers up, it automatically performs a reset. As part of the reset, the ADS1000 sets all of

the bits in the configuration register to their respective default settings.

Reset, it performs an internal reset, exactly as though it had just been powered on.

Copyright © 2009–2010, Texas Instruments Incorporated

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Product Folder Link(s): ADS1000-Q1