SL74HC75 datasheet(3/5 Pages) SLS

Part #	SL74HC75

Description	Dual 2-Bit Transparent Latch(High-Performance Silicon-Gate CMOS)

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Manufacturer	SLS [System Logic Semiconductor]

Direct Link	http://www.slsemicon.co.kr/e_index.htm

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SL74HC75

System Logic

Semiconductor

SLS

DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND)

VCC

Guaranteed Limit

Symbol

Parameter

Test Conditions

V

25

°C

to

-55

°C

≤85

°C

≤125

°C

Unit

VIH

Minimum High-Level

Input Voltage

VOUT=0.1 V or VCC-0.1 V

I

OUT

≤ 20 µA

2.0

4.5

6.0

1.5

3.15

4.2

1.5

3.15

4.2

1.5

3.15

4.2

V

VIL

Maximum Low -Level

Input Voltage

VOUT=0.1 V or VCC-0.1 V

I

OUT

 ≤ 20 µA

2.0

4.5

6.0

0.3

0.9

1.2

0.3

0.9

1.2

0.3

0.9

1.2

V

VOH

Minimum High-Level

Output Voltage

VIN=VIH or VIL

I

OUT

 ≤ 20 µA

2.0

4.5

6.0

1.9

4.4

5.9

1.9

4.4

5.9

1.9

4.4

5.9

V

VIN=VIH or VIL

I

OUT

 ≤ 4.0 mA

I

OUT

 ≤ 5.2 mA

4.5

6.0

3.98

5.48

3.84

5.34

3.7

5.2

VOL

Maximum Low-Level

Output Voltage

VIN= VIL or VIH

I

OUT

 ≤ 20 µA

2.0

4.5

6.0

0.1

V

VIN= VIL or VIH

I

OUT

 ≤ 4.0 mA

I

OUT

 ≤ 5.2 mA

4.5

6.0

0.26

0.33

0.4

IIN

Maximum Input

Leakage Current

VIN=VCC or GND

6.0

±0.1

±1.0

µA

ICC

Maximum Quiescent

Supply Current

(per Package)

VIN=VCC or GND

IOUT=0

µA

6.0

4.0

40

80

µA

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