Electronic Components Datasheet Search |
|
CDCLVD1212RHAR Datasheet(PDF) 6 Page - Texas Instruments |
|
|
CDCLVD1212RHAR Datasheet(HTML) 6 Page - Texas Instruments |
6 / 20 page CDCLVD1212 SCAS901B – SEPTEMBER 2010 – REVISED JANUARY 2011 www.ti.com TYPICAL CHARACTERISTICS INPUT- AND OUTPUT-CLOCK PHASE NOISES vs FREQUENCY FROM the CARRIER (TA = 25°C and VCC = 2.5V) Input clock RMS jitter is 32 fs from 10 kHz to 20 MHz and additive RMS jitter is 152 fs Figure 3. 100 MHz Input and Output Phase Noise Plot 6 Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): CDCLVD1212 |
Similar Part No. - CDCLVD1212RHAR |
|
Similar Description - CDCLVD1212RHAR |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |