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COP888CL Datasheet(PDF) 7 Page - Texas Instruments

Part # COP888CL
Description  COP888CL 8-Bit Microcontroller
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

COP888CL Datasheet(HTML) 7 Page - Texas Instruments

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DC Electrical Characteristics (Continued)
COP98XCL: 0˚C
≤ T
A ≤ + 70˚C unless otherwise specified.
Parameter
Conditions
Min
Typ
Max
Units
Maximum Input Current
T
A = 25˚C
±100
mA
without Latchup (Note 6)
RAM Retention Voltage, V
r
500 ns Rise
2
V
and Fall Time (Min)
Input Capacitance
7pF
Load Capacitance on D2
1000
pF
Note 3: Rate of voltage change must be less then 0.5 V/ms.
Note 4: Supply current is measured after running 2000 cycles with a square wave CKI input, CKO open, inputs at rails and outputs open.
Note 5: The HALT mode will stop CKI from oscillating in the RC and the Crystal configurations. Test conditions: All inputs tied to VCC, L and G0–G5 configured as
outputs and set high. The D port set to zero. The clock monitor is disabled.
AC Electrical Characteristics
0˚C
≤ T
A ≤ + 70˚C unless otherwise specified.
Parameter
Conditions
Min
Typ
Max
Units
Instruction Cycle Time (t
c)
Crystal or Resonator
4V
≤ V
CC ≤ 6V
1
DC
µs
2.5V
≤ V
CC < 4V
2.5
DC
µs
R/C Oscillator
4V
≤ V
CC ≤ 6V
3
DC
µs
2.5V
≤ V
CC < 4V
7.5
DC
µs
Inputs
t
SETUP
4V
≤ V
CC ≤ 6V
200
ns
2.5V
≤ V
CC < 4V
500
ns
t
HOLD
4V
≤ V
CC ≤ 6V
60
ns
2.5V
≤ V
CC < 4V
150
ns
Output Propagation Delay (Note 7)
R
L = 2.2k, CL = 100 pF
t
PD1,tPD0
SO, SK
4V
≤ V
CC ≤ 6V
0.7
µs
2.5V
≤ V
CC < 4V
1.75
µs
All Others
4V
≤ V
CC ≤ 6V
1
µs
2.5V
≤ V
CC < 4V
2.5
µs
MICROWIRESetup Time (t
UWS)20
ns
MICROWIRE Hold Time (t
UWH)56
ns
MICROWIRE Output Propagation Delay (t
UPD)
220
ns
Input Pulse Width
Interrupt Input High Time
1
t
c
Interrupt Input Low Time
1
t
c
Timer Input High Time
1
t
c
Timer Input Low Time
1
t
c
Reset Pulse Width
1
µs
Note 6: Pins G6 and RESET are designed with a high voltage input network for factory testing. These pins allow input voltages greater than VCC and the pins will
have sink current to VCCwhen biased at voltages greater than VCC (the pins do not have source current when biased at a voltage below VCC). The effective
resistance to VCC is 750Ω (typical). These two pins will not latch up. The voltage at the pins must be limited to less than 14V.
Note 7: The output propagation delay is referenced to the end of the instruction cycle where the output change occurs.
www.national.com
6


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