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HCT373 Datasheet(PDF) 1 Page - System Logic Semiconductor |
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HCT373 Datasheet(HTML) 1 Page - System Logic Semiconductor |
1 / 5 page SL74HCT373 System Logic Semiconductor SLS Octal 3-State Noninverting Transparent Latch High-Performance Silicon-Gate CMOS The SL74HCT373 may be used as a level converter for interfacing TTL or NMOS outputs to High-Speed CMOS inputs. The SL74HCT373 is identical in pinout to the LS/ALS373. The eight latches of the SL74HCT373 are transparent D-type latches. While the Latch Enable is high the Q outputs follow the Data Inputs. When Latch Enable is taken low, data meeting the setup and hold times becomes latched. The Output Enable does not affect the state of the latch, but when Output Enable is high, all outputs are forced to the high-impedance state. Thus, data may be latched even when the outputs are not enabled. • TTL/NMOS-Compatible Input Levels • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 4.5 to 5.5 V • Low Input Current: 1.0 µA ORDERING INFORMATION SL74HCT373N Plastic SL74HCT373D SOIC TA = -55 ° to 125° C for all packages PIN ASSIGNMENT FUNCTION TABLE Inputs Output Output Enable Latch Enable D Q L H H H L H L L L L X No Change H X X Z X = Don’t Care Z = High Impedance LOGIC DIAGRAM PIN 20=VCC PIN 10 = GND |
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