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SN75LVCP600DRFT Datasheet(PDF) 6 Page - Texas Instruments |
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SN75LVCP600DRFT Datasheet(HTML) 6 Page - Texas Instruments |
6 / 24 page SN75LVCP600DRF SLLSE63 – DECEMBER 2010 www.ti.com AUTO LOW POWER (ALP) MODE (see Figure 10) Auto Low Power (ALP) Mode is triggered when a channel is in the electrical idle state for >10 µs. • The device enters and exits Low Power Mode by actively monitoring input signal (VIDpp) level. When the input signal is in the electrical idle state, i.e., VIDpp <50 mV and stays in this state for >10 µs, the device automatically enters the low power state. In this state the output is driven to VCM and the device selectively shuts off internal circuitry to lower power by >90% of its normal operating power. While in ALP mode the device continues actively to monitor input signal levels. When the input signal exceeds the SATA OOB upper threshold level, the device reverts to the active state. Exit time from Auto Low Power Mode is <50 ns (max). OUT-OF-BAND (OOB) SUPPORT The squelch detector circuit within the device enables full detection of OOB signaling as specified in the SATA spec. When differential signal amplitude at the receiver input is 50 mVpp or less, the output is squelched. Differential signal amplitude of 90 mVpp or more is detected as an activity and therefore passed to the output indicating activity. Squelch circuit ON/OFF time is 5 ns max. While in squelch mode outputs are held to VCM. DEVICE POWER The SN75LVCP600 is designed to operate from a single 3.3 V supply. Always practice proper power supply sequencing procedure. Apply VCC first before any input signals are applied to the device. The power down sequence is in reverse order. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) VALUE UNIT Supply voltage range(2) VCC –0.5 to 4 V Voltage range Differential I/O –0.5 to 4 V Control I/O –0.5 to VCC + 0.5 V Electrostatic discharge Human body model(3) ±6000 V Charged-device model(4) ±1500 V Machine model(5) ±200 V Continuous power dissipation See Dissipation Rating Table (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values, except differential voltages, are with respect to network ground terminal. (3) Tested in accordance with JEDEC Standard 22, Test Method A114-B. (4) Tested in accordance with JEDEC Standard 22, Test Method C101-A. (5) Tested in accordance with JEDEC Standard 22, Test Method A115-A. THERMAL INFORMATION SN75LVCP600 THERMAL METRIC(1) UNITS DRF (8) PINS qJA Junction-to-ambient thermal resistance 97.8 qJCtop Junction-to-case (top) thermal resistance 81.9 qJB Junction-to-board thermal resistance 65.6 °C/W yJT Junction-to-top characterization parameter 1.3 yJB Junction-to-board characterization parameter 65.6 qJCbot Junction-to-case (bottom) thermal resistance 19.1 (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 6 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): SN75LVCP600DRF |
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