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SN75061 Datasheet(PDF) 1 Page - Texas Instruments |
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SN75061 Datasheet(HTML) 1 Page - Texas Instruments |
1 / 13 page SN75061 DRIVER/RECEIVER PAIR WITH SQUELCH SLLS026C − JANUARY 1987 − REVISED JULY 1990 Copyright 1990, Texas Instruments Incorporated 2−1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 • IEEE 802.3 1BASE5 Driver and Receiver • On-Chip Receiver Squelch With Adjustable Threshold • Adjustable Squelch Delay • Direct TTL-Level Squelch Output • Squelch Circuit Allows for External Noise Filtering • Two Driver-Enable Options • On-Chip Start-of-Idle Detection and Disable • Driver Provides 2-V Minimum into a 50-Ω Differential Load Allowing for Use With Doubly-Terminated Lines and Multipoint Architectures • On-Chip Driver Slew-Rate Control for Very Closely Matched Output Rise and Fall Times Function Tables DATEN INPUTS OUTPUTS L H X H L DRI DRO + L L H H H X X H L L DRO − H L Z L † H ‡ L H Z H † L ‡ DLEN DRIVER INPUTS OUTPUTS No active signal ¶ Active signal ¶ CONDITION RXI + RXO X L H X H L SQO H L L H L H RXI − RECEIVER§ † This condition is valid during the time period set by DRDLAJ following a rising transition on DRI. Following this, when a subsequent positive transition does not occur on DRI, the outputs go to the high-impedance state. ‡ This condition is valid when it occurs within the enable time set by DRDLAJ after a rising transition on DRI. Otherwise, the outputs are in the high-impedance state. § Pins 9 and 10 are tied together. ¶ An active signal is one that has an amplitude greater than the threshold level set by SQTHAJ. 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 DRDLAJ DRO + DRO − SQDLAJ RXI + RXI − SQTHAJ GND VCC DATEN DRI DLEN RXO SQO SQDLI SQRXO (TOP VIEW) N PACKAGE PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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