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TFB2010MHSB Datasheet(PDF) 1 Page - Texas Instruments |
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TFB2010MHSB Datasheet(HTML) 1 Page - Texas Instruments |
1 / 9 page TFB2010 FUTUREBUS+ ARBITRATION BUS CONTROLLER SLLS125A − OCTOBER 1990 − REVISED NOVEMBER 1993 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 Copyright 1993, Texas Instruments Incorporated 7−1 • Supports Distributed Arbitration for Futurebus+ Master Selection • Supports Arbitrated Messages in Distributed and Central Modes • Enables Use of a Common Hardware and Software Interface for Both Distributed and Central Modes • Requires No Hardware Modifications for Changing Between Distributed and Central Modes • Provides a CSR Bus Interface for Easy Integration into the Futurebus+ CSR Address Space • Has Two Bus Request Lines That Each May Be Assigned Any One of 256 Priority Levels • Supports Round-Robin Fairness Arbitration Within Two Separate Priority Levels to Avoid Starvation of Any Single Module • Supports Distributed-Mode Bus Parking to Improve Performance of Successive Bus Acquisitions By a Single Module During Idle Bus Conditions • Offers Accurate Arbitration Settling Time and Glitch Filter Programmability to Allow Optimal Arbitration Bus Performance • Provides a FIFO for Capturing up to Four Incoming Arbitrated Messages • Provides Hardware Support of Targeted Interrupts • Supports Power-Fail Message Indication With a Separate Terminal and Interrupt • Provides On-Chip Error Time-Out Detection • Has a JTAG Test Port description The TFB2010 arbitration bus controller (ABC) is a member of the Texas Instruments Futurebus + chip set. This chip set provides an integrated approach to the Futurebus + interface that reduces new-product design time, allows more functionality per circuit board, improves overall interface reliability, and reduces end-user down time through built-in test capabilities. The TFB2010 performs the Futurebus + distributed-arbitration protocol to gain tenure of the bus (distributed mode only), to send and receive arbitrated messages (central or distributed mode), and to update central-mode arbiter priorities (central mode only). The TFB2010 can be used in conjunction with a central-bus arbiter as an arbitrated-message controller to program the central-bus arbiter, send asynchronous interrupts, or send event messages or interrupts to other modules. In the case of a failure in the central-bus arbiter or if distributed arbitration is desired, it can be used as a distributed-arbitration controller without a change in the host software. Priority changes are sent to the central arbiter as arbitrated messages. This device monitors the bus for arbitration messages, storing these in a FIFO or in the targeted interrupt register for reference by the processor. It also provides the necessary control functions to gain control of the Futurebus + for a module attempting to perform a bus transaction when operating in the distributed-arbitration mode. The TFB2010 is offered in a 100-pin plastic quad flat package (PJM) to enhance interface capability. The TFB2010 is characterized for operation over the commercial temperature range of 0 °C to 70°C. NOTE: To maintain consistency with the notation used in the Futurebus + standard (IEEE Std 896.1−1991), an active low-signal is denoted herein by use of the trailing asterisk (*) on the signal name. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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