TFB2010

FUTUREBUS+ ARBITRATION BUS CONTROLLER

SLLS125A − OCTOBER 1990 − REVISED NOVEMBER 1993

POST OFFICE BOX 655303

POST OFFICE BOX 1443

77251−1443

Copyright

7−1

Futurebus+ Master Selection

Distributed and Central Modes

Software Interface for Both Distributed and

Central Modes

Changing Between Distributed and Central

Modes

Integration into the Futurebus+ CSR

Address Space

Be Assigned Any One of 256 Priority Levels

Within Two Separate Priority Levels to

Avoid Starvation of Any Single Module

Improve Performance of Successive Bus

Acquisitions By a Single Module During

Idle Bus Conditions

and Glitch Filter Programmability to Allow

Optimal Arbitration Bus Performance

Incoming Arbitrated Messages

Interrupts

With a Separate Terminal and Interrupt

description

The TFB2010 arbitration bus controller (ABC) is a member of the Texas Instruments Futurebus

+ chip set. This

chip set provides an integrated approach to the Futurebus

+ interface that reduces new-product design time,

allows more functionality per circuit board, improves overall interface reliability, and reduces end-user down time

through built-in test capabilities.

The TFB2010 performs the Futurebus

+ distributed-arbitration protocol to gain tenure of the bus (distributed

mode only), to send and receive arbitrated messages (central or distributed mode), and to update central-mode

arbiter priorities (central mode only).

The TFB2010 can be used in conjunction with a central-bus arbiter as an arbitrated-message controller to

program the central-bus arbiter, send asynchronous interrupts, or send event messages or interrupts to other

modules. In the case of a failure in the central-bus arbiter or if distributed arbitration is desired, it can be used

as a distributed-arbitration controller without a change in the host software. Priority changes are sent to the

central arbiter as arbitrated messages. This device monitors the bus for arbitration messages, storing these in

a FIFO or in the targeted interrupt register for reference by the processor. It also provides the necessary control

functions to gain control of the Futurebus

+ for a module attempting to perform a bus transaction when operating

in the distributed-arbitration mode.

The TFB2010 is offered in a 100-pin plastic quad flat package (PJM) to enhance interface capability. The

TFB2010 is characterized for operation over the commercial temperature range of 0

°C to 70°C.

NOTE: To maintain consistency with the notation used in the Futurebus

+ standard (IEEE Std 896.1−1991), an active low-signal is denoted herein

by use of the trailing asterisk (*) on the signal name.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.