EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS

Gain

Stage

+ EQ

RBBDC

VBB

Self−Biasing Network

LineEndTermination

VCC

VCC

ESD

IN+

IN−

= 50 W

= 50 W

VOCM

OUT−

OUT+

49.9 W

49.9 W

1 pF

SN65LVCP402

Figure 1. Equivalent Input Circuit Design

Figure 2. Common-Mode Output Voltage Test Circuit

Table 1. CROSSPOINT LOGIC TABLES

OUTPUT CHANNEL 1 (1Y/1Z)

OUTPUT CHANNEL 2 (2Y/2Z)

CONTROL

INPUT

CONTROL

INPUT

PINS

SELECTED

PINS

SELECTED

S1

S2

0

1A/1B

0

1A/1B

1

2A/2B

1

2A/2B

AVAILABLE OPTIONS

DESCRIPTION

RGE (24 pin)

-40°C to 85°C

Serial multiplexer

SN65LVCP402

(1)

The package is available taped and reeled. Add an R suffix to device types (e.g., SN65LVCP402RGER).

(2)

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com.

Copyright © 2007–2009, Texas Instruments Incorporated

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