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TLK110 Datasheet(PDF) 3 Page - Texas Instruments

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Part # TLK110
Description  Industrial Temp, Single Port 10/100Mbs Ethernet Physical Layer
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TLK110 Datasheet(HTML) 3 Page - Texas Instruments

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TLK110
www.ti.com
SLLS901A – DECEMBER 2011 – REVISED FEBRUARY 2012
1
Introduction
.............................................. 1
5
Architecture
............................................. 27
1.1
Features
............................................. 1
5.1
100Base-TX Transmit Path
......................... 27
1.2
Applications
.......................................... 1
5.2
100Base-TX Receive Path
......................... 30
1.3
Device Overview
..................................... 1
5.3
10Base-T Receive Path
............................ 32
2
Pin Descriptions
......................................... 4
5.4
Auto MDI/MDI-X Crossover
........................ 33
2.1
Pin Layout
........................................... 4
5.5
Auto Negotiation
.................................... 34
2.2
Serial Management Interface (SMI)
................. 5
5.6
Link Down Functionality
............................ 37
2.3
MAC Data Interface
.................................. 5
6
Reset and Power Down Operation
................. 38
2.4
10Mbs and 100Mbs PMD Interface
.................. 6
6.1
Hardware Reset
.................................... 38
2.5
Clock Interface
....................................... 6
6.2
Software Reset
..................................... 38
2.6
LED Interface
........................................ 6
6.3
Power Down/Interrupt
.............................. 38
2.7
JTAG Interface
....................................... 7
6.4
Power Save Modes
................................. 39
2.8
Reset and Power Down
............................. 7
7
Design Guidelines
..................................... 40
2.9
Power and Bias Connections
........................ 7
7.1
TPI Network Circuit
................................. 40
3
Hardware Configuration
............................... 8
7.2
Clock In (XI) Requirements
......................... 40
3.1
Bootstrap Configuration
.............................. 9
7.3
Thermal Vias Recommendation
.................... 42
3.2
Power Supply Configuration
........................ 10
8
Register Block
......................................... 43
3.3
IO Pins Hi-Z State During Reset
................... 12
8.1
Register Definition
.................................. 48
3.4
Auto-Negotiation
.................................... 12
8.2
Extended Register Addressing
..................... 62
3.5
Auto-MDIX
.......................................... 13
8.3
Extended Registers
................................. 63
3.6
MII Isolate Mode
.................................... 13
8.4
Cable Diagnostic Registers
......................... 72
3.7
PHY Address
....................................... 14
8.5
Cable Diagnostic Configuration/Result Registers
.. 74
3.8
Software Strapping Mode
.......................... 14
9
Electrical Specifications
............................. 80
3.9
LED Interface
....................................... 16
9.1
ABSOLUTE MAXIMUM RATINGS
................. 80
3.10
Loopback Functionality
............................. 17
9.2
THERMAL CHARACTERISTICS
................... 80
3.11
BIST
................................................ 18
9.3
RECOMMENDED OPERATING CONDITIONS
.... 80
3.12
Cable Diagnostics
.................................. 19
9.4
DC CHARACTERISTICS
........................... 81
4
Interfaces
................................................ 20
9.5
POWER SUPPLY CHARACTERISTICS
........... 82
4.1
Media Independent Interface (MII)
................. 20
9.6
AC Specifications
................................... 83
4.2
Reduced Media Independent Interface (RMII)
..... 20
Revision History
............................................ 99
4.3
Serial Management Interface
....................... 23
Copyright © 2011–2012, Texas Instruments Incorporated
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