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TLV320DAC3100 Datasheet(PDF) 11 Page - Texas Instruments

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Part # TLV320DAC3100
Description  Low-Power Stereo Audio DAC With Audio Processing and Mono Class-D Speaker Amplifier
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TLV320DAC3100 Datasheet(HTML) 11 Page - Texas Instruments

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STO
STA
STA
STO
SDA
SCL
t
BUF
t
LOW
t
SU;STA
t
HIGH
t
HD;STA
t
r
t
HD;STA
t
HD;DAT
t
SU;DAT
t
SU;STO
t
f
T0295-02
TLV320DAC3100
www.ti.com
SLAS671A – FEBRUARY 2010 – REVISED MAY 2012
3.4.5
I
2C Interface Timing
All specifications at 25°C, DVDD = 1.8 V
Note: All timing specifications are measured at characterization.
Standard Mode
Fast Mode
PARAMETER
UNIT
MIN
TYP
MAX
MIN
TYP
MAX
fSCL
SCL clock frequency
0
100
0
400
kHz
Hold time, (repeated) START condition.
tHD;STA
After this period, the first clock pulse is
4
0.8
μs
generated.
tLOW
LOW period of the SCL clock
4.7
1.3
μs
tHIGH
HIGH period of the SCL clock
4
0.6
μs
Setup time for a repeated START
tSU;STA
4.7
0.8
μs
condition
tHD;DAT
Data hold time: for I2C bus devices
0
3.45
0
0.9
μs
tSU;DAT
Data set-up time
250
100
ns
tr
SDA and SCL rise time
1000
20 + 0.1Cb
300
ns
tf
SDA and SCL fall time
300
20 + 0.1Cb
300
ns
tSU;STO
Set-up time for STOP condition
4
0.8
μs
Bus free time between a STOP and
tBUF
4.7
1.3
μs
START condition
Cb
Capacitive load for each bus line
400
400
pF
Figure 3-5. I2C Interface Timing
Copyright © 2010–2012, Texas Instruments Incorporated
ELECTRICAL SPECIFICATIONS
11
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