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REG101UA-AG4 Datasheet(PDF) 10 Page - Texas Instruments |
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REG101UA-AG4 Datasheet(HTML) 10 Page - Texas Instruments |
10 / 23 page REG101 10 SBVS026D FIGURE 4. Block Diagram. FIGURE 5. Output Noise versus Noise Reduction Capacitor. ENABLE The Enable pin is active HIGH and compatible with stan- dard TTL-CMOS levels. Inputs below 0.5V (max) turn the regulator off and all circuitry is disabled. Under this condi- tion, ground pin current drops to approximately 10nA. When a pull-up resistor is used, and operation down to VIN = 1.8V is required, use values < 50k Ω. OUTPUT NOISE A precision band-gap reference is used for the internal reference voltage, VREF. This reference is the dominant noise source within the REG101 and it generates approxi- mately 29 µVrms in the 10Hz to 100kHz bandwidth at the reference output. The regulator control loop gains up the reference noise, so that the noise voltage of the regulator is approximately given by: V = 29 Vrms R+ R R2 Vrms • V V N 1 2 OUT REF µµ = 29 Since the value of VREF is 1.267V, this relationship reduces to: V= 23 Vrms V V N OUT µ • Connecting a capacitor, CNR, from the Noise Reduction (NR) pin to ground, as shown in Figure 4, forms a low-pass filter for the voltage reference. For CNR = 10nF, the total noise in the 10Hz to 100kHz bandwidth is reduced by approximately a factor of 2.8 for VO = 3.3V. This noise reduction effect is shown in Figure 5 and as “RMS Noise Voltage vs CNR” in the Typical Characteristics section. Noise can be further reduced by carefully choosing an output capacitor, COUT. Best overall noise performance is achieved with very low (< 0.22 µF) or very high (> 2.2µF) values of COUT. See “RMS Noise Voltage vs COUT” in the Typical Characteristics section. The REG101 utilizes an internal charge pump to develop an internal supply voltage sufficient to drive the gate of the DMOS pass element above VIN. The charge-pump switch- ing noise (nominal switching frequency = 2MHz) is not measurable at the output of the regulator over most values of COUT and IOUT. The REG101 adjustable version does not have the noise- reduction pin available, however, the adjust pin is the sum- ming junction of the error amplifier. A capacitor, CFB, connected from the output to the adjust pin will reduce both the output noise and the peak error from a load transient. See the typical characteristics for output noise performance. Over Current Over Temp Protection V REF (1.26V) Low Noise Charge Pump DMOS Pass Transistor R 1 NOTE: R 1 and R2 are internal on fixed output versions. V OUT Adj (Adjustable Versions) R 2 NR (fixed output versions only) Enable REG101 V IN C NR (optional) 110 1k 100 10k 110 100 90 80 70 60 50 40 30 20 C NR (pF) RMS NOISE VOLTAGE vs C NR C NR = 0µF 10Hz < BW < 100kHz REG101-5.0 REG101-2.5 REG101-3.3 |
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