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SN65HVDA1040AQDRQ1 Datasheet(PDF) 5 Page - Texas Instruments |
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SN65HVDA1040AQDRQ1 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 24 page SN65HVDA1040A-Q1 www.ti.com SLLS995C – FEBRUARY 2010 – REVISED FEBRUARY 2011 Protection Features TXD Dominant State Timeout During normal mode (only mode where CAN driver is active) the TXD dominant time-out circuit prevents the transceiver from blocking network communication in event of a hardware or software failure where TXD is held dominant longer than the time out period tDST. The dominant time out circuit is triggered by a falling edge on TXD. If no rising edge is seen before the time-out constant of the circuit expires (tDST) the CAN bus driver is disabled freeing the bus for communication between other network nodes. The CAN driver is re-activated when a recessive signal is seen on TXD pin, thus clearing the dominant state time out. The CAN bus pins will be biased to recessive level during a TXD dominant state time-out and SPLIT will remain on. APPLICATION NOTE: The maximum dominant TXD time allowed by the TXD Dominant state time out limits the minimum possible data rate of the device. The CAN protocol allows a maximum of eleven successive dominant bits (on TXD) for the worst case, where five successive dominant bits are followed immediately by an error frame. This, along with the t(dom) minimum, limits the minimum bit rate. The minimum bit rate may be calculated by: Minimum Bit Rate = 11/t(dom) Thermal Shutdown If the junction temperature of the device exceeds the thermal shut down threshold the device will turn off the CAN driver circuits, including SPLIT pin. This condition is cleared once the temperature drops below the thermal shut down temperature of the device. Undervoltage Lockout / Unpowered Device The device has undervoltage detection and lockout on the VCC supply. If an undervoltage condition is detected on VCC, the device protects the bus. The TXD pin is pulled up to VCC to force a recessive input level if the pin floats. The STB is pulled up to VCC to force the device in standby mode (low power) if the pin floats. The bus pins (CANH, CANL, and SPLIT) all have extremely low leakage currents when the device is un-powered so it will not load down the bus but be an “ideal passive” load to the bus. This is critical, especially if some nodes of the network will be unpowered while the rest of the network remains in operation. © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): SN65HVDA1040A-Q1 |
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