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SN74HC74-EP Datasheet(PDF) 2 Page - Texas Instruments |
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SN74HC74-EP Datasheet(HTML) 2 Page - Texas Instruments |
2 / 12 page www.ti.com Absolute Maximum Ratings (1) RECOMMENDED OPERATING CONDITIONS (1) SN74HC74-EP DUAL D-TYPE POSITIVE EDGE TRIGGERED FLIP-FLOP WITH CLEAR AND PRESET SCLS710 – MARCH 2008 LOGIC DIAGRAM (POSITIVE LOGIC) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage range –0.5 7 V IIK Input clamp current VI < 0 or VI = 0 to VCC (1) ±20 mA IOK Output clamp current VO < 0 or VO = 0 to VCC (1) ±20 mA IO Continuous output current VO = 0 to VCC ±25 mA Continuous current through VCC or GND ±50 mA θ JA Package thermal impedance(2) PW package 113 °C/W Tstg Storage temperature range –60 150 °C (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The package thermal impedance is calculated in accordance with JESD 51-7. MIN NOM MAX UNIT VCC Supply voltage 2 5 6 V VCC = 2 V 1.5 VIH High-level input voltage VCC = 4.5 V 3.15 V VCC = 6 V 4.2 VCC = 2 V 0.5 VIL Low-level input voltage VCC = 4.5 V 1.35 V VCC = 6 V 1.8 VI Input voltage 0 VCC V VO Output voltage 0 VCC V VCC = 2 V 1000 Δt\Δv Input transition rise/fall time VCC = 4.5 V 500 ns VCC = 6 V 400 TA Operating free-air temperature –55 125 °C (1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 2 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): SN74HC74-EP |
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