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DAC3152IRGZR Datasheet(PDF) 6 Page - Texas Instruments |
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DAC3152IRGZR Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 30 page  DAC3152 DAC3162 SLAS736D – NOVEMBER 2010 – REVISED AUGUST 2012 www.ti.com ELECTRICAL CHARACTERISTICS – DIGITAL SPECIFICATIONS DVDD18 = CLKVDD18 = 1.8 V, AVDD33 = 3.3 V, fDAC = 500 MSPS, fOUT = 1 MHz over recommended operating free-air temperature range, IOUTFS = 20 mA (unless otherwise noted) DAC3152 DAC3162 PARAMETER TEST CONDITIONS UNIT MIN TYP MAX MIN TYP MAX LVDS INPUTS: DIGITAL INPUT DATA(1) Logic-high differential input voltage VA,B+ 150 400 150 400 mV threshold Logic-low differential input voltage VA,B– –400 –150 –400 –150 mV threshold VCOM Input common mode 0.9 1.2 1.5 0.9 1.2 1.5 V ZT Internal termination 85 110 135 85 110 135 Ω CL LVDS input capacitance 2 2 pF fINTERL Interleaved LVDS data rate 1000 1000 MSPS fDATA Input data rate (per DAC) 500 500 MSPS CLOCK INPUT: DACCLKP/N Duty cycle 40% 60% 40% 60% Differential voltage 0.2 1 0.2 1 V Clock frequency 500 500 MHz CMOS INTERFACE: SLEEPB VIH High-level input voltage 2 2 V VIL Low-level input voltage 0.8 0.8 V IIH High-level input current -40 40 -40 40 µA IIL Low-level input current -40 40 -40 40 µA CI CMOS Input capacitance 2 2 pF DIGITAL INPUT DATA TIMING SPECIFICATIONS: DOUBLE EDGE LATCHING Setup time, valid to either edge of ts(DATA) 200 200 ps DACCLKP/N Hold time, valid after either edge of th(DATA) 200 200 ps DACCLKP/N (1) See LVDS INPUTS section for terminology. 6 Submit Documentation Feedback Copyright © 2010–2012, Texas Instruments Incorporated Product Folder Links: DAC3152 DAC3162 |
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