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TMS470R1VF55BAPGET Datasheet(PDF) 5 Page - Texas Instruments |
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TMS470R1VF55BAPGET Datasheet(HTML) 5 Page - Texas Instruments |
5 / 59 page TMS470R1VF55BA 16/32-BIT RISC FLASH MICROCONTROLLER SPNS087A – AUGUST 2003 – REVISED AUGUST 2004 5 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251-1443 device characteristics The TMS470R1VF55BA device is a derivative of the F05 system emulation device SE470R1VB8AD. Table 1 identifies all the characteristics of the TMS470R1VF55BA device except the SYSTEM and CPU, which are generic. The COMMENTS column aids the user in software-programming and references device-specific in- formation. Table 1. Device Characteristics CHARACTERISTICS DEVICE DESCRIPTION TMS470R1VF55BA COMMENTS FOR VF55BA MEMORY For the number of memory selects on this device, see the Memory Selection Assignment table (Table 2). INTERNAL MEMORY Pipeline/Non-Pipeline Flash is pipeline-capable The VF55BA RAM is implemented in one 48K array selected by two memory-select signals (see the Memory Selection Assignment table, Table 2). 768K-Byte Flash 48K-Byte SRAM PERIPHERALS For the device-specific interrupt priority configurations, see the Interrupt Priority (IEM and CIM) table (Table 6). And for the 1K peripheral address ranges and their peripheral selects, see the VF55BA Peripherals, System Module, and Flash Base Addresses table (Table 4). CLOCK ZPLL Zero-pin PLL has no external loop filter pins. GENERAL-PURPOSE I/Os 15 I/O 1 Input only In VF55BA, port A has eight (8) external pins, port B has one (1), port C has three (3), and port D has four (4). ECP YES SCI 2 (3-pin) SCI1 and SCI2 CAN (HECC and/or SCC) 3 HECCs Three HECCs (HECC1, HECC2, and HECC3) SPI (5-pin, 4-pin or 3-pin) 5 (5-pin) SPI1, SPI2, SPI3, SPI4, and SPI5 (VF55BA) HET with XOR Share 32 I/O The VF55BA device has both the logic and registers for a full 32-I/O HET implemented and all 32 pins are available externally. The high-resolution (HR) SHARE feature allows even HR pins to share the next higher odd HR pin structures. This HR sharing is independent of whether or not the odd pin is available externally. If an odd pin is available externally and shared, then the odd pin can only be used as a general-purpose I/O. For more information on HR SHARE, see the TMS470R1x High-End Timer (HET) Refe4rence Guide (literature number SPNU199). HET RAM 128-Instruction Capacity MibADC 10-bit, 16-channel 256-word FIFO The VF55BA device has both the logic and registers for a full 16-channel MibADC implemented and all 16 pins are available externally. CORE VOLTAGE 1.81 - 2.05 V I/O VOLTAGE 3.0 - 3.6 V PINS 144 PACKAGE PGE |
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