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TMS470R1VC346APZ-T Datasheet(PDF) 5 Page - Texas Instruments

Part # TMS470R1VC346APZ-T
Description  16/32-BIT RISC ROM MICROCONTROLLERS
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TMS470R1VC346APZ-T Datasheet(HTML) 5 Page - Texas Instruments

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TMS470R1VC336,TMS470R1VC346
16/32-BIT RISC ROM MICROCONTROLLERS
SPNS084E – MAY 2003 – REVISED AUGUST 2006
5
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251-1443
description (continued)
The VC3x6 device has six communication interfaces: two SPIs, two SCIs, an SCC, and a C2SIa. The SPI
provides a convenient method of serial interaction for high-speed communications between similar shift-register
type devices. The SCI is a full-duplex, serial I/O interface intended for asynchronous communication between
the CPU and other peripherals using the standard Non-Return-to-Zero (NRZ) format. The SCC uses a serial,
multimaster communication protocol that efficiently supports distributed real-time control with robust
communication rates of up to 1 megabit per second (Mbps). The SCC is ideal for applications operating in noisy
and harsh environments (e.g., automotive and industrial fields) that require reliable serial communication or
multiplexed wiring. The C2SIa allows the VC3x6 to transmit and receive messages on a class II network following
an SAE J1850standard. For more detailed functional information on the SPI, SCI, and SCC peripherals, see
the specific TMS470R1x Peripheral Reference Guides (literature numbers SPNU195, SPNU196, and
SPNU197, respectively). For more detailed functional information on the C2SIa peripheral, see the TMS470R1x
Class II Serial Interface A (C2SIa) Reference Guide (literature number SPNU218).
The HET is an advanced intelligent timer that provides sophisticated timing functions for real-time applications.
The timer is software-controlled, using a reduced instruction set, with a specialized timer micromachine and
an attached I/O port. The HET can be used for compare, capture, or general-purpose I/O. It is especially well
suited for applications requiring multiple sensor information and drive actuators with complex and accurate
time pulses. For more detailed functional information on the HET, see the TMS470R1x High-End Timer (HET)
Reference Guide (literature number SPNU199). The VC3x6 HET peripheral contains the XOR-share feature.
This feature allows two adjacent HET high-resolution channels to be XORed together, making it possible to
output smaller pulses than a standard HET. For more detailed information on the HET XOR-share feature, see
the TMS470R1x High-End Timer (HET) Reference Guide (literature number SPNU199).
The VC3x6 device has a 10-bit-resolution sample-and-hold MibADC. The MibADC channels can be converted
individually or can be grouped by software for sequential conversion sequences. There are three separate
groupings, two of which are triggerable by an external event. Each sequence can be converted once when
triggered or configured for continuous conversion mode. For more detailed functional information on the Mi-
bADC, see the TMS470R1x Multi-Buffered Analog-to-Digital Converter (MibADC) Reference Guide (literature
number SPNU206).
The zero-pin phase-locked loop (ZPLL) clock module contains a phase-locked loop, a clock-monitor circuit, a
clock-enable circuit, and a prescaler (with prescale values of 1–8). The function of the ZPLL is to multiply the
external frequency reference to a higher frequency for internal use. The ZPLL provides ACLKto the system
(SYS) module. The SYS module subsequently provides system clock (SYSCLK), real-time interrupt clock
(RTICLK), CPU clock (MCLK), and peripheral interface clock (ICLK) to all other VC3x6 device modules. For
more detailed functional information on the ZPLL, see the TMS470R1x Zero-Pin Phase-Locked Loop (ZPLL)
Clock Module Reference Guide (literature number SPNU212).
The VC3x6 device also has an external clock prescaler (ECP) module that when enabled, outputs a continuous
external clock (ECLK) on a specified GIO pin. The ECLK frequency is a user-programmable ratio of the pe-
ripheral interface clock (ICLK) frequency. For more detailed functional information on the ECP, see the
TMS470R1x External Clock Prescaler (ECP) Reference Guide (literature number SPNU202).
device characteristics
The TMS470R1VC3x6 device is a derivative of the F05 system emulation device SE470R1VB8AD. Table 1
identifies all the characteristics of the TMS470R1VC3x6 device except the SYSTEM and CPU, which are
generic. The COMMENTS column aids the user in software-programming and references device-specific in-
formation.
† SAE Standard J1850 Class B Data Communication Network Interface
‡ ACLK should not be confused with the MibADC internal clock, ADCLK. ACLK is the continuous system clock from an external resonator/crystal
reference.


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