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TPS7A4001 Datasheet(PDF) 10 Page - Texas Instruments |
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TPS7A4001 Datasheet(HTML) 10 Page - Texas Instruments |
10 / 17 page P =(V V )I - D IN OUT OUT TPS7A4001 SBVS162A – MARCH 2011 – REVISED MARCH 2011 www.ti.com LAYOUT PACKAGE MOUNTING Any tendency to activate the thermal protection circuit Solder pad footprint recommendations for the indicates excessive power dissipation or an TPS7A4001 are available at the end of this product inadequate heatsink. For reliable operation, junction data sheet and at www.ti.com. temperature should be limited to a maximum of +125 °C. To estimate the margin of safety in a complete design (including heatsink), increase the BOARD LAYOUT RECOMMENDATIONS TO ambient temperature until the thermal protection is IMPROVE PSRR AND NOISE PERFORMANCE triggered; use worst-case loads and signal conditions. To improve ac performance such as PSRR, output For good reliability, thermal protection should trigger noise, and transient response, it is recommended that at least +35 °C above the maximum expected ambient the board be designed with separate ground planes condition of the particular application. This for IN and OUT, with each ground plane connected configuration produces a worst-case junction only at the GND pin of the device. In addition, the temperature of +125 °C at the highest expected ground connection for the output capacitor should ambient temperature and worst-case load. connect directly to the GND pin of the device. The internal protection circuitry of the TPS7A4001 Equivalent series inductance (ESL) and ESR must be has been designed to protect against overload minimized in order to maximize performance and conditions. It was not intended to replace proper ensure stability. Every capacitor (CIN, COUT, CBYP) heatsinking. Continuously running the TPS7A4001 must be placed as close as possible to the device into thermal shutdown degrades device reliability. and on the same side of the PCB as the regulator itself. POWER DISSIPATION Do not place any of the capacitors on the opposite The ability to remove heat from the die is different for side of the PCB from where the regulator is installed. each package type, presenting different The use of vias and long traces is strongly considerations in the PCB layout. The PCB area discouraged because they may impact system around the device that is free of other components performance negatively and even cause instability. moves the heat from the device to the ambient air. Performance data for JEDEC low- and high-K boards If possible, and to ensure the maximum performance are given in the Dissipation Ratings Table. Using denoted in this product data sheet, use the same heavier copper increases the effectiveness in layout pattern used for TPS7A40 evaluation board, removing heat from the device. The addition of plated available at www.ti.com. through-holes to heat dissipating layers also improves the heatsink effectiveness. THERMAL PROTECTION Power dissipation depends on input voltage and load Thermal protection disables the output when the conditions. Power dissipation (PD) is equal to the junction temperature rises to approximately +170 °C, product of the output current times the voltage drop allowing the device to cool. When the junction across the output pass element, as shown in temperature cools to approximately +150 °C, the Equation 2: output circuitry is enabled. Depending on power dissipation, thermal resistance, and ambient (2) temperature, the thermal protection circuit may cycle on and off. This cycling limits the dissipation of the regulator, protecting it from damage as a result of overheating. 10 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TPS7A4001 |
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