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TPS43340QPHPQ1 Datasheet(PDF) 6 Page - Texas Instruments |
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TPS43340QPHPQ1 Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 38 page  TPS43340-Q1 SLVSB16B – NOVEMBER 2011 – REVISED APRIL 2012 www.ti.com ELECTRICAL CHARACTERISTICS (continued) VIN = VLR1 = 8 V to 18 V, VSUP = 4 V to 10 V, VIN2SENSE = 4V to 40V, TJ = -40°C to 150°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Buck Controllers VBuck1/2 Adjustable output voltage range Closed loop 0.9 11 V VSENSE1/2 pin, load = 0 mA 0.792 0.800 0.808 V Vref, Internal reference voltage Internal tolerance on reference -1 1 % VSENSE1/2 pin, load = 0 mA 0.784 0.800 0.816 V Internal reference voltage in low Vref, LPM power mode Tolerance -2 2 % Maximum peak forward current S1-S2 respectively S3-S4 VSENSEx = 0.75 V, low duty 60 75 90 mV sense voltage in CCM cycles Vsense Minimum peak forward current S1-S2 respectively S3-S4 VSENSEx = 1 V -65 -37.5 -23 mV sense voltage in CCM Maximum peak forward current VI-Foldback S1-S2 respectively S3-S4 VSENSEx =0V (foldback) 17 43.8 48 mV sense voltage during output short tdead Shoot through delay, blanking time 20 ns Minimum on time High side minimum on time 100 ns DCNRM Duty cycle Maximum duty cycle 98.75 % DCLPM Duty cycle LPM 80 % LPM entry threshold load current as ILPM_Entry 1 % fraction of maximum set load current The exit threshold is specified to be always higher than entry threshold LPM exit threshold load current as VLPM_Exit 10 % fraction of maximum set load current High-Side External NMOS Gate Drivers for Buck Controllers IGUx_peak Gate driver peak current 0.6 A RDS_ON Source and sink driver IVREG = 5.8 V, IGUx current = 200 mA 5 Ω Low-Side NMOS Gate Drivers for Buck Controllers IGLx_peak Gate driver peak current 0.6 A RDS_ON Source and sink driver VREG = 5.8V, IGLx current = 200 mA 5 Ω Internal Oscillator (RT) fSW Buck switching frequency RT pin: GND 360 400 440 kHz fSW Buck switching frequency RT pin: 60 k Ω external resistor 360 400 440 kHz fSW-adj Buck adjustable range Using external resistor on RT (see equation) 150 600 kHz fsync Buck synch. range External clock input on SYNC 150 600 kHz VRT Oscillator reference voltage 1.2 V SYNC rising edge to PH rising edge fSW-Prop dly 0 20 40 ns delay Last SYNC rising edge to return to fSW-Trans-delay resistor mode if CLK is not present 20 µs on SYNC pin Error Amplifier (OTA) for Buck Controllers and Buck Converter IPULLUP_VSENSEx Pull-up current at VSENSEx pins VSENSEx = 0 V 50 100 200 nA COMP1, COMP2 = 0.8 V; source/sink = 5 µA, Test in gm Forward transconductance 0.7 0.9 1.35 mS feedback loop 6 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): TPS43340-Q1 |
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